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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-29 15:36:47 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-29 15:36:47 +0000
commit0c0ed03b404a93a76c9e5345ed2d0d4dc381fb99 (patch)
treeb5c226e1f347b38feeb4ff86e77ca41161c02d67
parent864951afddef424870629933262b16b70247851d (diff)
target-mips: fix divu instruction
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6949 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-mips/translate.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index d8638a63a5..905bca75e5 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1847,6 +1847,8 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
int l1 = gen_new_label();
+ tcg_gen_ext32u_tl(t0, t0);
+ tcg_gen_ext32u_tl(t1, t1);
tcg_gen_brcondi_tl(TCG_COND_EQ, t1, 0, l1);
tcg_gen_divu_tl(cpu_LO[0], t0, t1);
tcg_gen_remu_tl(cpu_HI[0], t0, t1);