diff options
| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-26 23:55:31 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-26 23:55:31 +0000 |
| commit | b8d3f5d1264260db42e1d64c9d7c537df0aa31ce (patch) | |
| tree | b6fb0befe472e2026f5645cad057296142cb1c1c | |
| parent | a750fc0b9184a520d00d9e949160a0c6d3232ecd (diff) | |
Add flags to support PowerPC 405 bootinfos variations.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3245 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | hw/ppc405.h | 3 | ||||
| -rw-r--r-- | hw/ppc405_boards.c | 2 | ||||
| -rw-r--r-- | hw/ppc405_uc.c | 5 |
3 files changed, 6 insertions, 4 deletions
diff --git a/hw/ppc405.h b/hw/ppc405.h index b3f3b3d806..eacbefedd9 100644 --- a/hw/ppc405.h +++ b/hw/ppc405.h @@ -57,7 +57,8 @@ struct ppc4xx_bd_info_t { CPUState *ppc405_init (const unsigned char *cpu_model, clk_setup_t *cpu_clk, clk_setup_t *tb_clk, uint32_t sysclk); -ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd); +ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd, + uint32_t flags); /* */ typedef struct ppc4xx_mmio_t ppc4xx_mmio_t; diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c index 69655d84cd..8f82ea9e1a 100644 --- a/hw/ppc405_boards.c +++ b/hw/ppc405_boards.c @@ -288,7 +288,7 @@ static void ref405ep_init (int ram_size, int vga_ram_size, int boot_device, bd.bi_plb_busfreq = 33333333; bd.bi_pci_busfreq = 33333333; bd.bi_opbfreq = 33333333; - bdloc = ppc405_set_bootinfo(env, &bd); + bdloc = ppc405_set_bootinfo(env, &bd, 0x00000001); env->gpr[3] = bdloc; kernel_base = KERNEL_LOAD_ADDR; /* now we can load the kernel */ diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c index e3cbb09a23..aa5963aee8 100644 --- a/hw/ppc405_uc.c +++ b/hw/ppc405_uc.c @@ -69,7 +69,8 @@ CPUState *ppc405_init (const unsigned char *cpu_model, return env; } -ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd) +ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd, + uint32_t flags) { ram_addr_t bdloc; int i, n; @@ -103,7 +104,7 @@ ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd) for (i = 0; i < 6; i++) stb_raw(phys_ram_base + bdloc + 0x64 + i, bd->bi_pci_enetaddr[i]); n = 0x6A; - if (env->spr[SPR_PVR] == CPU_PPC_405EP) { + if (flags & 0x00000001) { for (i = 0; i < 6; i++) stb_raw(phys_ram_base + bdloc + n++, bd->bi_pci_enetaddr2[i]); } |