diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-05-27 11:19:05 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-05-30 17:05:11 +0100 |
| commit | fc7c8829447b8b01ed8d33f01228562f8af36790 (patch) | |
| tree | 1e04d71f0a90d9ee47cf376612cae7314d35e03f | |
| parent | 72c7f90621b46b6d7efb98fb64045638c7e3032f (diff) | |
target/arm: Use TRANS_FEAT for do_FMLAL_zzxw
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-113-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/translate-sve.c | 26 |
1 files changed, 4 insertions, 22 deletions
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 57bff0d345..5fb66547ec 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -7161,33 +7161,15 @@ TRANS_FEAT(FMLSLT_zzzw, aa64_sve2, do_FMLAL_zzzw, a, true, true) static bool do_FMLAL_zzxw(DisasContext *s, arg_rrxr_esz *a, bool sub, bool sel) { - if (!dc_isar_feature(aa64_sve2, s)) { - return false; - } return gen_gvec_ptr_zzzz(s, gen_helper_sve2_fmlal_zzxw_s, a->rd, a->rn, a->rm, a->ra, (a->index << 2) | (sel << 1) | sub, cpu_env); } -static bool trans_FMLALB_zzxw(DisasContext *s, arg_rrxr_esz *a) -{ - return do_FMLAL_zzxw(s, a, false, false); -} - -static bool trans_FMLALT_zzxw(DisasContext *s, arg_rrxr_esz *a) -{ - return do_FMLAL_zzxw(s, a, false, true); -} - -static bool trans_FMLSLB_zzxw(DisasContext *s, arg_rrxr_esz *a) -{ - return do_FMLAL_zzxw(s, a, true, false); -} - -static bool trans_FMLSLT_zzxw(DisasContext *s, arg_rrxr_esz *a) -{ - return do_FMLAL_zzxw(s, a, true, true); -} +TRANS_FEAT(FMLALB_zzxw, aa64_sve2, do_FMLAL_zzxw, a, false, false) +TRANS_FEAT(FMLALT_zzxw, aa64_sve2, do_FMLAL_zzxw, a, false, true) +TRANS_FEAT(FMLSLB_zzxw, aa64_sve2, do_FMLAL_zzxw, a, true, false) +TRANS_FEAT(FMLSLT_zzxw, aa64_sve2, do_FMLAL_zzxw, a, true, true) TRANS_FEAT(SMMLA, aa64_sve_i8mm, gen_gvec_ool_arg_zzzz, gen_helper_gvec_smmla_b, a, 0) |