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authorNathan Froyd <froydnj@codesourcery.com>2010-02-20 10:19:09 -0800
committerAurelien Jarno <aurelien@aurel32.net>2010-02-23 19:47:24 +0100
commitc2c65dab45bc640dc7a3d1fb259472b029bb420f (patch)
tree3582ee1215c188d6e5b997d0b8afc273df818310
parent6462bfcdeda8ac9061e52f15ed06aae16b260d4c (diff)
target-mips: fix CpU exception for coprocessor 0
When we signal a CpU exception for coprocessor 0, we should indicate that it's for coprocessor 0 instead of coprocessor 1. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-mips/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 11944444ea..eb46b42ed1 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -830,7 +830,7 @@ static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv
static inline void check_cp0_enabled(DisasContext *ctx)
{
if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0)))
- generate_exception_err(ctx, EXCP_CpU, 1);
+ generate_exception_err(ctx, EXCP_CpU, 0);
}
static inline void check_cp1_enabled(DisasContext *ctx)