diff options
| author | Jia Liu <proljc@gmail.com> | 2012-07-20 15:50:46 +0800 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-07-27 21:13:01 +0000 |
| commit | dd29c7fb0189cb2415bee3f411afcfcf9290e466 (patch) | |
| tree | 28d0bb81889ebe294e43fcb7138d24b1fc8400a5 | |
| parent | bbe418f25d070745fd350ab71c3bfca58ea5e62c (diff) | |
target-or32: Add PIC support
Add OpenRISC Programmable Interrupt Controller support.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | hw/openrisc/Makefile.objs | 2 | ||||
| -rw-r--r-- | hw/openrisc_pic.c | 60 | ||||
| -rw-r--r-- | target-openrisc/cpu.h | 3 |
3 files changed, 65 insertions, 0 deletions
diff --git a/hw/openrisc/Makefile.objs b/hw/openrisc/Makefile.objs index bfead214fc..98900aa6a4 100644 --- a/hw/openrisc/Makefile.objs +++ b/hw/openrisc/Makefile.objs @@ -1 +1,3 @@ +obj-y = openrisc_pic.o + obj-y := $(addprefix ../,$(obj-y)) diff --git a/hw/openrisc_pic.c b/hw/openrisc_pic.c new file mode 100644 index 0000000000..aaeb9a9171 --- /dev/null +++ b/hw/openrisc_pic.c @@ -0,0 +1,60 @@ +/* + * OpenRISC Programmable Interrupt Controller support. + * + * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com> + * Feng Gao <gf91597@gmail.com> + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ + +#include "hw.h" +#include "cpu.h" + +/* OpenRISC pic handler */ +static void openrisc_pic_cpu_handler(void *opaque, int irq, int level) +{ + OpenRISCCPU *cpu = (OpenRISCCPU *)opaque; + int i; + uint32_t irq_bit = 1 << irq; + + if (irq > 31 || irq < 0) { + return; + } + + if (level) { + cpu->env.picsr |= irq_bit; + } else { + cpu->env.picsr &= ~irq_bit; + } + + for (i = 0; i < 32; i++) { + if ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i))) { + cpu_interrupt(&cpu->env, CPU_INTERRUPT_HARD); + } else { + cpu_reset_interrupt(&cpu->env, CPU_INTERRUPT_HARD); + cpu->env.picsr &= ~(1 << i); + } + } +} + +void cpu_openrisc_pic_init(OpenRISCCPU *cpu) +{ + int i; + qemu_irq *qi; + qi = qemu_allocate_irqs(openrisc_pic_cpu_handler, cpu, NR_IRQS); + + for (i = 0; i < NR_IRQS; i++) { + cpu->env.irq[i] = qi[i]; + } +} diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 51013f3fc1..419c31ab44 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -355,6 +355,9 @@ int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, #define cpu_handle_mmu_fault cpu_openrisc_handle_mmu_fault #ifndef CONFIG_USER_ONLY +/* hw/openrisc_pic.c */ +void cpu_openrisc_pic_init(OpenRISCCPU *cpu); + void cpu_openrisc_mmu_init(OpenRISCCPU *cpu); int cpu_openrisc_get_phys_nommu(OpenRISCCPU *cpu, target_phys_addr_t *physical, |