diff options
| author | Richard Henderson <rth@twiddle.net> | 2016-12-27 14:59:24 +0000 |
|---|---|---|
| committer | Michael Roth <mdroth@linux.vnet.ibm.com> | 2017-03-21 14:50:19 -0500 |
| commit | 74b13f92c2428abae41a61c46a5cf47545da5fcb (patch) | |
| tree | e9a9689fb7e6ef640f018869161f9cca45facb0c | |
| parent | 4bcb497c7e762f6828d7cb3aa1f6f578ffe1d415 (diff) | |
target-arm: Fix aarch64 disas_ldst_single_struct
We add s->be_data within do_vec_ld/st. Adding it here means that
we have the wrong bits set in SIZE for a big-endian host, leading
to g_assert_not_reached in write_vec_element and read_vec_element.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1481085020-2614-3-git-send-email-rth@twiddle.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 0a97c40f8e7172ac3d8db97fb22d0ef3025de307)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
| -rw-r--r-- | target-arm/translate-a64.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 6dc27a6115..434dae165e 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -2829,9 +2829,9 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn) } else { /* Load/store one element per register */ if (is_load) { - do_vec_ld(s, rt, index, tcg_addr, s->be_data + scale); + do_vec_ld(s, rt, index, tcg_addr, scale); } else { - do_vec_st(s, rt, index, tcg_addr, s->be_data + scale); + do_vec_st(s, rt, index, tcg_addr, scale); } } tcg_gen_addi_i64(tcg_addr, tcg_addr, ebytes); |