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authorEmilio G. Cota <cota@braap.org>2018-06-22 13:45:31 -0400
committerPeter Maydell <peter.maydell@linaro.org>2018-06-22 18:55:24 +0100
commitf28d0dfdce5754d80d2a5993fff2f5312b32cac1 (patch)
treea617a0509e7b4eac361345a3f1d0a1a33fcc0dfb
parent7ed14cbf3cf083f125c079bd02b3215941853830 (diff)
tcg: fix --disable-tcg build breakage
Fix the --disable-tcg breakage introduced by tb_lock's removal by relying on the fact that tcg_enabled() is set to 0 at compile-time under --disable-tcg. While at it, add further asserts to fix builds that enable both --disable-tcg and --enable-debug, which were broken even before tb_lock's removal. Tested to build x86_64-softmmu and i386-softmmu targets. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--accel/stubs/tcg-stub.c4
-rw-r--r--cpus.c4
-rw-r--r--exec.c3
3 files changed, 7 insertions, 4 deletions
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
index ee575a8718..76ae461749 100644
--- a/accel/stubs/tcg-stub.c
+++ b/accel/stubs/tcg-stub.c
@@ -21,10 +21,6 @@ void tb_flush(CPUState *cpu)
{
}
-void tb_unlock(void)
-{
-}
-
void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
{
}
diff --git a/cpus.c b/cpus.c
index 19c5d37108..b5844b7103 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1355,6 +1355,7 @@ static int tcg_cpu_exec(CPUState *cpu)
int64_t ti;
#endif
+ assert(tcg_enabled());
#ifdef CONFIG_PROFILER
ti = profile_getclock();
#endif
@@ -1397,6 +1398,7 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg)
{
CPUState *cpu = arg;
+ assert(tcg_enabled());
rcu_register_thread();
tcg_register_thread();
@@ -1631,6 +1633,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
{
CPUState *cpu = arg;
+ assert(tcg_enabled());
g_assert(!use_icount);
rcu_register_thread();
@@ -1854,6 +1857,7 @@ static void qemu_tcg_init_vcpu(CPUState *cpu)
static QemuThread *single_tcg_cpu_thread;
static int tcg_region_inited;
+ assert(tcg_enabled());
/*
* Initialize TCG regions--once. Now is a good time, because:
* (1) TCG's init context, prologue and target globals have been set up.
diff --git a/exec.c b/exec.c
index 28f9bdcbf9..88edb59060 100644
--- a/exec.c
+++ b/exec.c
@@ -1323,6 +1323,7 @@ static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
RAMBlock *block;
ram_addr_t end;
+ assert(tcg_enabled());
end = TARGET_PAGE_ALIGN(start + length);
start &= TARGET_PAGE_MASK;
@@ -2655,6 +2656,7 @@ void memory_notdirty_write_prepare(NotDirtyInfo *ndi,
void memory_notdirty_write_complete(NotDirtyInfo *ndi)
{
if (ndi->pages) {
+ assert(tcg_enabled());
page_collection_unlock(ndi->pages);
ndi->pages = NULL;
}
@@ -3046,6 +3048,7 @@ static void tcg_commit(MemoryListener *listener)
CPUAddressSpace *cpuas;
AddressSpaceDispatch *d;
+ assert(tcg_enabled());
/* since each CPU stores ram addresses in its TLB cache, we must
reset the modified entries */
cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);