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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2006-02-04 19:30:51 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2006-02-04 19:30:51 +0000
commit0240ded8bb1580147ed2ff1748df439a3b41e38f (patch)
tree3aee02d6cd3a3e55a0c9f1214739dcf2da4dbf59
parent0fd14b72ac91516a0415f626d632ffa86f1e1a05 (diff)
Correctly initialize Arm CPU for Thumb entry points.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1739 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--linux-user/elfload.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index f1af656dc0..29730dca78 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -100,7 +100,9 @@ static inline void init_thread(struct target_pt_regs *regs, struct image_info *i
target_long *stack = (void *)infop->start_stack;
memset(regs, 0, sizeof(*regs));
regs->ARM_cpsr = 0x10;
- regs->ARM_pc = infop->entry;
+ if (infop->entry & 1)
+ regs->ARM_cpsr |= CPSR_T;
+ regs->ARM_pc = infop->entry & 0xfffffffe;
regs->ARM_sp = infop->start_stack;
regs->ARM_r2 = tswapl(stack[2]); /* envp */
regs->ARM_r1 = tswapl(stack[1]); /* argv */