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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-26 23:52:06 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-26 23:52:06 +0000
commit08fa4bab833f834e1511853dd2331fa3d6d5d469 (patch)
tree7da59ed6f5bba4553e357e53fce51078accbc5f8
parentfe253235b2b3c78587c049b8504c2ef2ea7b5ced (diff)
hflags computation cleanup, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3243 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-mips/exec.h26
-rw-r--r--target-mips/helper.c10
-rw-r--r--target-mips/op.c58
3 files changed, 32 insertions, 62 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h
index d5aadedb81..9ff3f08b59 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -243,7 +243,8 @@ static inline void regs_to_env(void)
{
}
-static inline int cpu_halted(CPUState *env) {
+static inline int cpu_halted(CPUState *env)
+{
if (!env->halted)
return 0;
if (env->interrupt_request &
@@ -254,4 +255,27 @@ static inline int cpu_halted(CPUState *env) {
return EXCP_HALTED;
}
+static inline void compute_hflags(CPUState *env)
+{
+ env->hflags &= ~(MIPS_HFLAG_64 | MIPS_HFLAG_CP0 | MIPS_HFLAG_F64 |
+ MIPS_HFLAG_FPU | MIPS_HFLAG_UM);
+ if (!(env->CP0_Status & (1 << CP0St_EXL)) &&
+ !(env->CP0_Status & (1 << CP0St_ERL)) &&
+ !(env->hflags & MIPS_HFLAG_DM) &&
+ (env->CP0_Status & (1 << CP0St_UM)))
+ env->hflags |= MIPS_HFLAG_UM;
+#ifdef TARGET_MIPS64
+ if (!(env->hflags & MIPS_HFLAG_UM) ||
+ (env->CP0_Status & (1 << CP0St_PX)) ||
+ (env->CP0_Status & (1 << CP0St_UX)))
+ env->hflags |= MIPS_HFLAG_64;
+#endif
+ if ((env->CP0_Status & (1 << CP0St_CU0)) || !(env->hflags & MIPS_HFLAG_UM))
+ env->hflags |= MIPS_HFLAG_CP0;
+ if (env->CP0_Status & (1 << CP0St_CU1))
+ env->hflags |= MIPS_HFLAG_FPU;
+ if (env->CP0_Status & (1 << CP0St_FR))
+ env->hflags |= MIPS_HFLAG_F64;
+}
+
#endif /* !defined(__QEMU_MIPS_EXEC_H__) */
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 5c19a7ca4a..8e4233ed7b 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -368,10 +368,8 @@ void do_interrupt (CPUState *env)
env->CP0_DEPC = env->PC[env->current_tc];
}
enter_debug_mode:
- env->hflags |= MIPS_HFLAG_DM;
- env->hflags |= MIPS_HFLAG_64;
+ env->hflags |= MIPS_HFLAG_DM | MIPS_HFLAG_64 | MIPS_HFLAG_CP0;
env->hflags &= ~MIPS_HFLAG_UM;
- env->hflags |= MIPS_HFLAG_CP0;
/* EJTAG probe trap enable is not implemented... */
if (!(env->CP0_Status & (1 << CP0St_EXL)))
env->CP0_Cause &= ~(1 << CP0Ca_BD);
@@ -396,9 +394,8 @@ void do_interrupt (CPUState *env)
env->CP0_ErrorEPC = env->PC[env->current_tc];
}
env->CP0_Status |= (1 << CP0St_ERL) | (1 << CP0St_BEV);
- env->hflags |= MIPS_HFLAG_64;
+ env->hflags |= MIPS_HFLAG_64 | MIPS_HFLAG_CP0;
env->hflags &= ~MIPS_HFLAG_UM;
- env->hflags |= MIPS_HFLAG_CP0;
if (!(env->CP0_Status & (1 << CP0St_EXL)))
env->CP0_Cause &= ~(1 << CP0Ca_BD);
env->PC[env->current_tc] = (int32_t)0xBFC00000;
@@ -499,9 +496,8 @@ void do_interrupt (CPUState *env)
env->CP0_Cause &= ~(1 << CP0Ca_BD);
}
env->CP0_Status |= (1 << CP0St_EXL);
- env->hflags |= MIPS_HFLAG_64;
+ env->hflags |= MIPS_HFLAG_64 | MIPS_HFLAG_CP0;
env->hflags &= ~MIPS_HFLAG_UM;
- env->hflags |= MIPS_HFLAG_CP0;
}
env->hflags &= ~MIPS_HFLAG_BMASK;
if (env->CP0_Status & (1 << CP0St_BEV)) {
diff --git a/target-mips/op.c b/target-mips/op.c
index b8c5ce8d54..2f513aeb6f 100644
--- a/target-mips/op.c
+++ b/target-mips/op.c
@@ -1841,30 +1841,8 @@ void op_mtc0_status (void)
val = T0 & mask;
old = env->CP0_Status;
- if (!(val & (1 << CP0St_EXL)) &&
- !(val & (1 << CP0St_ERL)) &&
- !(env->hflags & MIPS_HFLAG_DM) &&
- (val & (1 << CP0St_UM)))
- env->hflags |= MIPS_HFLAG_UM;
-#ifdef TARGET_MIPS64
- if ((env->hflags & MIPS_HFLAG_UM) &&
- !(val & (1 << CP0St_PX)) &&
- !(val & (1 << CP0St_UX)))
- env->hflags &= ~MIPS_HFLAG_64;
-#endif
- if ((val & (1 << CP0St_CU0)) || !(env->hflags & MIPS_HFLAG_UM))
- env->hflags |= MIPS_HFLAG_CP0;
- else
- env->hflags &= ~MIPS_HFLAG_CP0;
- if (val & (1 << CP0St_CU1))
- env->hflags |= MIPS_HFLAG_FPU;
- else
- env->hflags &= ~MIPS_HFLAG_FPU;
- if (val & (1 << CP0St_FR))
- env->hflags |= MIPS_HFLAG_F64;
- else
- env->hflags &= ~MIPS_HFLAG_F64;
env->CP0_Status = (env->CP0_Status & ~mask) | val;
+ CALL_FROM_TB1(compute_hflags, env);
if (loglevel & CPU_LOG_EXEC)
CALL_FROM_TB2(do_mtc0_status_debug, old, val);
CALL_FROM_TB1(cpu_mips_update_irq, env);
@@ -3009,21 +2987,7 @@ void op_eret (void)
env->PC[env->current_tc] = env->CP0_EPC;
env->CP0_Status &= ~(1 << CP0St_EXL);
}
- if (!(env->CP0_Status & (1 << CP0St_EXL)) &&
- !(env->CP0_Status & (1 << CP0St_ERL)) &&
- !(env->hflags & MIPS_HFLAG_DM) &&
- (env->CP0_Status & (1 << CP0St_UM)))
- env->hflags |= MIPS_HFLAG_UM;
-#ifdef TARGET_MIPS64
- if ((env->hflags & MIPS_HFLAG_UM) &&
- !(env->CP0_Status & (1 << CP0St_PX)) &&
- !(env->CP0_Status & (1 << CP0St_UX)))
- env->hflags &= ~MIPS_HFLAG_64;
-#endif
- if ((env->CP0_Status & (1 << CP0St_CU0)) || !(env->hflags & MIPS_HFLAG_UM))
- env->hflags |= MIPS_HFLAG_CP0;
- else
- env->hflags &= ~MIPS_HFLAG_CP0;
+ CALL_FROM_TB1(compute_hflags, env);
if (loglevel & CPU_LOG_EXEC)
CALL_FROM_TB0(debug_post_eret);
env->CP0_LLAddr = 1;
@@ -3035,22 +2999,8 @@ void op_deret (void)
if (loglevel & CPU_LOG_EXEC)
CALL_FROM_TB0(debug_pre_eret);
env->PC[env->current_tc] = env->CP0_DEPC;
- env->hflags |= MIPS_HFLAG_DM;
- if (!(env->CP0_Status & (1 << CP0St_EXL)) &&
- !(env->CP0_Status & (1 << CP0St_ERL)) &&
- !(env->hflags & MIPS_HFLAG_DM) &&
- (env->CP0_Status & (1 << CP0St_UM)))
- env->hflags |= MIPS_HFLAG_UM;
-#ifdef TARGET_MIPS64
- if ((env->hflags & MIPS_HFLAG_UM) &&
- !(env->CP0_Status & (1 << CP0St_PX)) &&
- !(env->CP0_Status & (1 << CP0St_UX)))
- env->hflags &= ~MIPS_HFLAG_64;
-#endif
- if ((env->CP0_Status & (1 << CP0St_CU0)) || !(env->hflags & MIPS_HFLAG_UM))
- env->hflags |= MIPS_HFLAG_CP0;
- else
- env->hflags &= ~MIPS_HFLAG_CP0;
+ env->hflags &= MIPS_HFLAG_DM;
+ CALL_FROM_TB1(compute_hflags, env);
if (loglevel & CPU_LOG_EXEC)
CALL_FROM_TB0(debug_post_eret);
env->CP0_LLAddr = 1;