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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-10 11:01:31 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-10 11:01:31 +0000
commitedea5f0193b200f15a0f852c0c3ca64bf8432da4 (patch)
tree331dbcb47d40a75ada0eb891dae9fea644ac18fb
parent7c60cc4bcaee6614b7b9a713f974b5d8e536e9c6 (diff)
no need to define global registers in cpu-exec.c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4409 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-i386/exec.h45
1 files changed, 4 insertions, 41 deletions
diff --git a/target-i386/exec.h b/target-i386/exec.h
index 11d12c9b00..2c482b2c7d 100644
--- a/target-i386/exec.h
+++ b/target-i386/exec.h
@@ -32,6 +32,8 @@
/* at least 4 register variables are defined */
register struct CPUX86State *env asm(AREG0);
+#ifndef CPU_NO_GLOBAL_REGS
+
#if TARGET_LONG_BITS > HOST_LONG_BITS
/* no registers can be used */
@@ -47,49 +49,10 @@ register target_ulong T0 asm(AREG1);
register target_ulong T1 asm(AREG2);
register target_ulong T2 asm(AREG3);
-/* if more registers are available, we define some registers too */
-#ifdef AREG4
-register target_ulong EAX asm(AREG4);
-#define reg_EAX
-#endif
-
-#ifdef AREG5
-register target_ulong ESP asm(AREG5);
-#define reg_ESP
-#endif
-
-#ifdef AREG6
-register target_ulong EBP asm(AREG6);
-#define reg_EBP
-#endif
-
-#ifdef AREG7
-register target_ulong ECX asm(AREG7);
-#define reg_ECX
-#endif
-
-#ifdef AREG8
-register target_ulong EDX asm(AREG8);
-#define reg_EDX
-#endif
-
-#ifdef AREG9
-register target_ulong EBX asm(AREG9);
-#define reg_EBX
-#endif
-
-#ifdef AREG10
-register target_ulong ESI asm(AREG10);
-#define reg_ESI
-#endif
-
-#ifdef AREG11
-register target_ulong EDI asm(AREG11);
-#define reg_EDI
-#endif
-
#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
+#endif /* ! CPU_NO_GLOBAL_REGS */
+
#define A0 T2
extern FILE *logfile;