diff options
author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-12 09:19:36 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-12 09:19:36 +0000 |
commit | a07dec2212d6ba9751dd1dac2b3f4b560325fee0 (patch) | |
tree | a6df3df7f76d85b3c592521be006ef909115b918 | |
parent | b645bb48850fea8db017026897827f0ab42fbdea (diff) |
Correct NAND erase block size. Misc fixes in Spitz code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2806 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | hw/nand.c | 2 | ||||
-rw-r--r-- | hw/pxa.h | 2 | ||||
-rw-r--r-- | hw/pxa2xx.c | 8 | ||||
-rw-r--r-- | hw/pxa2xx_lcd.c | 3 | ||||
-rw-r--r-- | hw/spitz.c | 4 |
5 files changed, 9 insertions, 10 deletions
@@ -547,7 +547,7 @@ static void glue(nand_blk_erase_, PAGE_SIZE)(struct nand_flash_s *s) page = i >> 9; if (bdrv_read(s->bdrv, page, iobuf, 1) == -1) printf("%s: read error in sector %i\n", __FUNCTION__, page); - memset(iobuf, 0xff, addr & 0x1ff); + memset(iobuf, 0xff, ((addr - 1) & 0x1ff) + 1); if (bdrv_write(s->bdrv, page, iobuf, 1) == -1) printf("%s: write error in sector %i\n", __FUNCTION__, page); } @@ -59,9 +59,9 @@ # define PXA2XX_SDRAM_BASE 0xa0000000 # define PXA2XX_INTERNAL_BASE 0x5c000000 +# define PXA2XX_INTERNAL_SIZE 0x40000 /* pxa2xx_pic.c */ -struct pxa2xx_pic_state_s; qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env); /* pxa2xx_timer.c */ diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index 4661011d7b..a791f0845c 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -1634,10 +1634,10 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, cpu_arm_set_model(s->env, "pxa255"); /* SDRAM & Internal Memory Storage */ - cpu_register_physical_memory(PXA2XX_SDRAM_BASE, - sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM); - cpu_register_physical_memory(PXA2XX_INTERNAL_BASE, - 0x40000, qemu_ram_alloc(0x40000) | IO_MEM_RAM); + cpu_register_physical_memory(PXA2XX_SDRAM_BASE, sdram_size, + qemu_ram_alloc(sdram_size) | IO_MEM_RAM); + cpu_register_physical_memory(PXA2XX_INTERNAL_BASE, PXA2XX_INTERNAL_SIZE, + qemu_ram_alloc(PXA2XX_INTERNAL_SIZE) | IO_MEM_RAM); s->pic = pxa2xx_pic_init(0x40d00000, s->env); diff --git a/hw/pxa2xx_lcd.c b/hw/pxa2xx_lcd.c index a594e278f5..db20a93663 100644 --- a/hw/pxa2xx_lcd.c +++ b/hw/pxa2xx_lcd.c @@ -737,8 +737,7 @@ static void pxa2xx_lcdc_dma0_redraw_horiz(struct pxa2xx_lcdc_s *s, dest, src, s->xres, s->dest_width); if (addr < start) start = addr; - if (new_addr > end) - end = new_addr; + end = new_addr; if (y < *miny) *miny = y; if (y >= *maxy) diff --git a/hw/spitz.c b/hw/spitz.c index aecace0073..72b049e4e8 100644 --- a/hw/spitz.c +++ b/hw/spitz.c @@ -1003,9 +1003,9 @@ static void spitz_common_init(int ram_size, int vga_ram_size, cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; /* Setup CPU & memory */ - if (ram_size < spitz_ram + spitz_rom) { + if (ram_size < spitz_ram + spitz_rom + PXA2XX_INTERNAL_SIZE) { fprintf(stderr, "This platform requires %i bytes of memory\n", - spitz_ram + spitz_rom); + spitz_ram + spitz_rom + PXA2XX_INTERNAL_SIZE); exit(1); } cpu = pxa270_init(spitz_ram, ds, cpu_model); |