diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2018-03-20 12:56:19 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2018-03-20 12:56:20 +0000 |
commit | 036793aebfc1dd0ce124fa278d7668d89b5da936 (patch) | |
tree | 5379e9c3085460af6aa2665a07b2250f51c6b60f | |
parent | d1fd31f82219c306aed7c35c370852d2f8d331a8 (diff) | |
parent | c078ca968c6c7cb62781c1843d840cb0f5c72781 (diff) |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
Machine and x86 queue, 2018-03-19
* cpu_model/cpu_type cleanups
* x86: Fix on Intel Processor Trace CPUID checks
# gpg: Signature made Mon 19 Mar 2018 20:07:14 GMT
# gpg: using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request:
i386: Disable Intel PT if packets IP payloads have LIP values
cpu: drop unnecessary NULL check and cpu_common_class_by_name()
cpu: get rid of unused cpu_init() defines
Use cpu_create(type) instead of cpu_init(cpu_model)
cpu: add CPU_RESOLVING_TYPE macro
tests: add machine 'none' with -cpu test
nios2: 10m50_devboard: replace cpu_model with cpu_type
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | bsd-user/main.c | 4 | ||||
-rw-r--r-- | exec.c | 23 | ||||
-rw-r--r-- | hw/core/null-machine.c | 6 | ||||
-rw-r--r-- | hw/nios2/10m50_devboard.c | 2 | ||||
-rw-r--r-- | include/hw/boards.h | 1 | ||||
-rw-r--r-- | include/qom/cpu.h | 16 | ||||
-rw-r--r-- | linux-user/main.c | 8 | ||||
-rw-r--r-- | qom/cpu.c | 61 | ||||
-rw-r--r-- | target/alpha/cpu.h | 3 | ||||
-rw-r--r-- | target/arm/cpu.h | 3 | ||||
-rw-r--r-- | target/cris/cpu.h | 3 | ||||
-rw-r--r-- | target/hppa/cpu.h | 2 | ||||
-rw-r--r-- | target/i386/cpu.c | 13 | ||||
-rw-r--r-- | target/i386/cpu.h | 3 | ||||
-rw-r--r-- | target/lm32/cpu.h | 3 | ||||
-rw-r--r-- | target/m68k/cpu.h | 3 | ||||
-rw-r--r-- | target/microblaze/cpu.h | 2 | ||||
-rw-r--r-- | target/mips/cpu.h | 3 | ||||
-rw-r--r-- | target/moxie/cpu.h | 3 | ||||
-rw-r--r-- | target/nios2/cpu.h | 2 | ||||
-rw-r--r-- | target/openrisc/cpu.h | 3 | ||||
-rw-r--r-- | target/ppc/cpu.h | 3 | ||||
-rw-r--r-- | target/riscv/cpu.h | 1 | ||||
-rw-r--r-- | target/s390x/cpu.h | 3 | ||||
-rw-r--r-- | target/sh4/cpu.h | 3 | ||||
-rw-r--r-- | target/sparc/cpu.h | 5 | ||||
-rw-r--r-- | target/tilegx/cpu.h | 2 | ||||
-rw-r--r-- | target/tricore/cpu.h | 3 | ||||
-rw-r--r-- | target/unicore32/cpu.h | 3 | ||||
-rw-r--r-- | target/xtensa/cpu.h | 3 | ||||
-rw-r--r-- | tests/Makefile.include | 2 | ||||
-rw-r--r-- | tests/machine-none-test.c | 103 | ||||
-rw-r--r-- | vl.c | 10 |
33 files changed, 178 insertions, 130 deletions
diff --git a/bsd-user/main.c b/bsd-user/main.c index 05aa5594a9..283dc6fd25 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -723,6 +723,7 @@ int main(int argc, char **argv) { const char *filename; const char *cpu_model; + const char *cpu_type; const char *log_file = NULL; const char *log_mask = NULL; struct target_pt_regs regs1, *regs = ®s1; @@ -900,7 +901,8 @@ int main(int argc, char **argv) tcg_exec_init(0); /* NOTE: we need to init the CPU at this stage to get qemu_host_page_size */ - cpu = cpu_init(cpu_model); + cpu_type = parse_cpu_model(cpu_model); + cpu = cpu_create(cpu_type); env = cpu->env_ptr; #if defined(TARGET_SPARC) || defined(TARGET_PPC) cpu_reset(cpu); @@ -817,6 +817,29 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) #endif } +const char *parse_cpu_model(const char *cpu_model) +{ + ObjectClass *oc; + CPUClass *cc; + gchar **model_pieces; + const char *cpu_type; + + model_pieces = g_strsplit(cpu_model, ",", 2); + + oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]); + if (oc == NULL) { + error_report("unable to find CPU model '%s'", model_pieces[0]); + g_strfreev(model_pieces); + exit(EXIT_FAILURE); + } + + cpu_type = object_class_get_name(oc); + cc = CPU_CLASS(oc); + cc->parse_features(cpu_type, model_pieces[1], &error_fatal); + g_strfreev(model_pieces); + return cpu_type; +} + #if defined(CONFIG_USER_ONLY) static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) { diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c index 864832db34..cde4d3eb57 100644 --- a/hw/core/null-machine.c +++ b/hw/core/null-machine.c @@ -24,9 +24,9 @@ static void machine_none_init(MachineState *mch) { CPUState *cpu = NULL; - /* Initialize CPU (if a model has been specified) */ - if (mch->cpu_model) { - cpu = cpu_init(mch->cpu_model); + /* Initialize CPU (if user asked for it) */ + if (mch->cpu_type) { + cpu = cpu_create(mch->cpu_type); if (!cpu) { error_report("Unable to initialize CPU"); exit(1); diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index e4007f6d7f..42053b2ca9 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -75,7 +75,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine) phys_ram_alias); /* Create CPU -- FIXME */ - cpu = NIOS2_CPU(cpu_generic_init(TYPE_NIOS2_CPU, "nios2")); + cpu = NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU)); /* Register: CPU interrupt controller (PIC) */ cpu_irq = nios2_cpu_pic_init(cpu); diff --git a/include/hw/boards.h b/include/hw/boards.h index 8ce9a7a21d..a609239112 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -252,7 +252,6 @@ struct MachineState { char *kernel_filename; char *kernel_cmdline; char *initrd_filename; - const char *cpu_model; const char *cpu_type; AccelState *accelerator; CPUArchIdList *possible_cpus; diff --git a/include/qom/cpu.h b/include/qom/cpu.h index dc6d4956a8..14e45c4282 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -662,8 +662,7 @@ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); CPUState *cpu_create(const char *typename); /** - * cpu_parse_cpu_model: - * @typename: The CPU base type or CPU type. + * parse_cpu_model: * @cpu_model: The model string including optional parameters. * * processes optional parameters and registers them as global properties @@ -671,18 +670,7 @@ CPUState *cpu_create(const char *typename); * Returns: type of CPU to create or prints error and terminates process * if an error occurred. */ -const char *cpu_parse_cpu_model(const char *typename, const char *cpu_model); - -/** - * cpu_generic_init: - * @typename: The CPU base type. - * @cpu_model: The model string including optional parameters. - * - * Instantiates a CPU, processes optional parameters and realizes the CPU. - * - * Returns: A #CPUState or %NULL if an error occurred. - */ -CPUState *cpu_generic_init(const char *typename, const char *cpu_model); +const char *parse_cpu_model(const char *cpu_model); /** * cpu_has_work: diff --git a/linux-user/main.c b/linux-user/main.c index 108e1f202c..ba09b7d0c8 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -45,6 +45,7 @@ static const char *argv0; static int gdbstub_port; static envlist_t *envlist; static const char *cpu_model; +static const char *cpu_type; unsigned long mmap_min_addr; unsigned long guest_base; int have_guest_base; @@ -4114,7 +4115,7 @@ void init_task_state(TaskState *ts) CPUArchState *cpu_copy(CPUArchState *env) { CPUState *cpu = ENV_GET_CPU(env); - CPUState *new_cpu = cpu_init(cpu_model); + CPUState *new_cpu = cpu_create(cpu_type); CPUArchState *new_env = new_cpu->env_ptr; CPUBreakpoint *bp; CPUWatchpoint *wp; @@ -4597,10 +4598,13 @@ int main(int argc, char **argv, char **envp) if (cpu_model == NULL) { cpu_model = cpu_get_model(get_elf_eflags(execfd)); } + cpu_type = parse_cpu_model(cpu_model); + tcg_exec_init(0); /* NOTE: we need to init the CPU at this stage to get qemu_host_page_size */ - cpu = cpu_init(cpu_model); + + cpu = cpu_create(cpu_type); env = cpu->env_ptr; cpu_reset(cpu); @@ -67,37 +67,6 @@ CPUState *cpu_create(const char *typename) return cpu; } -const char *cpu_parse_cpu_model(const char *typename, const char *cpu_model) -{ - ObjectClass *oc; - CPUClass *cc; - gchar **model_pieces; - const char *cpu_type; - - model_pieces = g_strsplit(cpu_model, ",", 2); - - oc = cpu_class_by_name(typename, model_pieces[0]); - if (oc == NULL) { - error_report("unable to find CPU model '%s'", model_pieces[0]); - g_strfreev(model_pieces); - exit(EXIT_FAILURE); - } - - cpu_type = object_class_get_name(oc); - cc = CPU_CLASS(oc); - cc->parse_features(cpu_type, model_pieces[1], &error_fatal); - g_strfreev(model_pieces); - return cpu_type; -} - -CPUState *cpu_generic_init(const char *typename, const char *cpu_model) -{ - /* TODO: all callers of cpu_generic_init() need to be converted to - * call cpu_parse_features() only once, before calling cpu_generic_init(). - */ - return cpu_create(cpu_parse_cpu_model(typename, cpu_model)); -} - bool cpu_paging_enabled(const CPUState *cpu) { CPUClass *cc = CPU_GET_CLASS(cpu); @@ -317,41 +286,24 @@ static bool cpu_common_has_work(CPUState *cs) ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) { - CPUClass *cc; - - if (!cpu_model) { - return NULL; - } - cc = CPU_CLASS(object_class_by_name(typename)); + CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); + assert(cpu_model && cc->class_by_name); return cc->class_by_name(cpu_model); } -static ObjectClass *cpu_common_class_by_name(const char *cpu_model) -{ - return NULL; -} - static void cpu_common_parse_features(const char *typename, char *features, Error **errp) { - char *featurestr; /* Single "key=value" string being parsed */ char *val; static bool cpu_globals_initialized; + /* Single "key=value" string being parsed */ + char *featurestr = features ? strtok(features, ",") : NULL; - /* TODO: all callers of ->parse_features() need to be changed to - * call it only once, so we can remove this check (or change it - * to assert(!cpu_globals_initialized). - * Current callers of ->parse_features() are: - * - cpu_generic_init() - */ - if (cpu_globals_initialized) { - return; - } + /* should be called only once, catch invalid users */ + assert(!cpu_globals_initialized); cpu_globals_initialized = true; - featurestr = features ? strtok(features, ",") : NULL; - while (featurestr) { val = strchr(featurestr, '='); if (val) { @@ -457,7 +409,6 @@ static void cpu_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); CPUClass *k = CPU_CLASS(klass); - k->class_by_name = cpu_common_class_by_name; k->parse_features = cpu_common_parse_features; k->reset = cpu_common_reset; k->get_arch_id = cpu_common_get_arch_id; diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index a79fc2e780..7b50be785d 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -466,10 +466,9 @@ enum { void alpha_translate_init(void); -#define cpu_init(cpu_model) cpu_generic_init(TYPE_ALPHA_CPU, cpu_model) - #define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU #define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf); /* you can call this signal handler from your SIGBUS and SIGSEGV diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 1e7e1f8a7e..19a0c03f9b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2302,10 +2302,9 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, return unmasked || pstate_unmasked; } -#define cpu_init(cpu_model) cpu_generic_init(TYPE_ARM_CPU, cpu_model) - #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_ARM_CPU #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 764b35cbae..8bb1dbc989 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -267,10 +267,9 @@ enum { #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_CRIS_CPU, cpu_model) - #define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU #define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_CRIS_CPU #define cpu_signal_handler cpu_cris_signal_handler diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index c88d844938..19dd12a93e 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -266,7 +266,7 @@ static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch) void hppa_translate_init(void); -#define cpu_init(cpu_model) cpu_generic_init(TYPE_HPPA_CPU, cpu_model) +#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 739a1cf47a..555ae79d29 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -195,6 +195,8 @@ * bit[02]: Support Single-Range Output scheme; */ #define INTEL_PT_MINIMAL_ECX 0x7 +/* generated packets which contain IP payloads have LIP values */ +#define INTEL_PT_IP_LIP (1 << 31) #define INTEL_PT_ADDR_RANGES_NUM 0x2 /* Number of configurable address ranges */ #define INTEL_PT_ADDR_RANGES_NUM_MASK 0x3 #define INTEL_PT_MTC_BITMAP (0x0249 << 16) /* Support ART(0,3,6,9) */ @@ -781,13 +783,7 @@ static char *x86_cpu_type_name(const char *model_name) static ObjectClass *x86_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; - char *typename; - - if (cpu_model == NULL) { - return NULL; - } - - typename = x86_cpu_type_name(cpu_model); + char *typename = x86_cpu_type_name(cpu_model); oc = object_class_by_name(typename); g_free(typename); return oc; @@ -4173,7 +4169,8 @@ static int x86_cpu_filter_features(X86CPU *cpu) ((eax_1 & INTEL_PT_ADDR_RANGES_NUM_MASK) < INTEL_PT_ADDR_RANGES_NUM) || ((ebx_1 & (INTEL_PT_PSB_BITMAP | INTEL_PT_CYCLE_BITMAP)) != - (INTEL_PT_PSB_BITMAP | INTEL_PT_CYCLE_BITMAP))) { + (INTEL_PT_PSB_BITMAP | INTEL_PT_CYCLE_BITMAP)) || + (ecx_0 & INTEL_PT_IP_LIP)) { /* * Processor Trace capabilities aren't configurable, so if the * host can't emulate the capabilities we report on diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 2e2bab5ff3..78db1b833a 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1589,10 +1589,9 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define PHYS_ADDR_MASK MAKE_64BIT_MASK(0, TCG_PHYS_ADDR_BITS) -#define cpu_init(cpu_model) cpu_generic_init(TYPE_X86_CPU, cpu_model) - #define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU #define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_X86_CPU #ifdef TARGET_X86_64 #define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu64") diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index ce0a2f24c4..66157eefe9 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -255,10 +255,9 @@ void lm32_watchpoint_insert(CPULM32State *env, int index, target_ulong address, void lm32_watchpoint_remove(CPULM32State *env, int index); bool lm32_cpu_do_semihosting(CPUState *cs); -#define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model) - #define LM32_CPU_TYPE_SUFFIX "-" TYPE_LM32_CPU #define LM32_CPU_TYPE_NAME(model) model LM32_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_LM32_CPU #define cpu_list lm32_cpu_list #define cpu_signal_handler cpu_lm32_signal_handler diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 2259bf22dc..c63adf772f 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -527,10 +527,9 @@ enum { #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_M68K_CPU, cpu_model) - #define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU #define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_M68K_CPU #define cpu_signal_handler cpu_m68k_signal_handler #define cpu_list m68k_cpu_list diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 1fe21c8539..5be71bc320 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -343,7 +343,7 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_MICROBLAZE_CPU, cpu_model) +#define CPU_RESOLVING_TYPE TYPE_MICROBLAZE_CPU #define cpu_signal_handler cpu_mb_signal_handler diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 7f8ba5ff3e..cfe1735e0e 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -739,10 +739,9 @@ enum { int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); -#define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model) - #define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_MIPS_CPU bool cpu_supports_cps_smp(const char *cpu_type); bool cpu_supports_isa(const char *cpu_type, unsigned int isa); diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index d85e1fc061..d40f1e6c45 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -119,10 +119,9 @@ void moxie_translate_init(void); int cpu_moxie_signal_handler(int host_signum, void *pinfo, void *puc); -#define cpu_init(cpu_model) cpu_generic_init(TYPE_MOXIE_CPU, cpu_model) - #define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU #define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU #define cpu_signal_handler cpu_moxie_signal_handler diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index cd4e40d1b4..145796e8ce 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -230,7 +230,7 @@ void nios2_check_interrupts(CPUNios2State *env); # define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif -#define cpu_init(cpu_model) cpu_generic_init(TYPE_NIOS2_CPU, cpu_model) +#define CPU_RESOLVING_TYPE TYPE_NIOS2_CPU #define cpu_gen_code cpu_nios2_gen_code #define cpu_signal_handler cpu_nios2_signal_handler diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 5050b1135c..35cab65f11 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -389,10 +389,9 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu, int *prot, target_ulong address, int rw); #endif -#define cpu_init(cpu_model) cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model) - #define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU #define OPENRISC_CPU_TYPE_NAME(model) model OPENRISC_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU #include "exec/cpu-all.h" diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 7bde1884a1..c621a6bd5e 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1375,10 +1375,9 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); -#define cpu_init(cpu_model) cpu_generic_init(TYPE_POWERPC_CPU, cpu_model) - #define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU #define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index cff02a2857..41e06ac0f9 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -46,6 +46,7 @@ #define RISCV_CPU_TYPE_SUFFIX "-" TYPE_RISCV_CPU #define RISCV_CPU_TYPE_NAME(name) (name RISCV_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_RISCV_CPU #define TYPE_RISCV_CPU_ANY RISCV_CPU_TYPE_NAME("any") #define TYPE_RISCV_CPU_RV32GCSU_V1_09_1 RISCV_CPU_TYPE_NAME("rv32gcsu-v1.9.1") diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 5f357a4e2d..3ee40f08b7 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -719,10 +719,9 @@ void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen, uint8_t ec_ga, /* helper.c */ -#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model) - #define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU #define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_S390_CPU /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index a649b68d78..775b5743bf 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -272,10 +272,9 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr); void cpu_load_tlb(CPUSH4State * env); -#define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model) - #define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU #define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU #define cpu_signal_handler cpu_sh4_signal_handler #define cpu_list sh4_cpu_list diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 9724134a5b..4972ebcfd4 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -652,12 +652,9 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr, #endif int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); -#ifndef NO_CPU_IO_DEFS -#define cpu_init(cpu_model) cpu_generic_init(TYPE_SPARC_CPU, cpu_model) -#endif - #define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU #define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_SPARC_CPU #define cpu_signal_handler cpu_sparc_signal_handler #define cpu_list sparc_cpu_list diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h index 71cea04589..238f8d36d7 100644 --- a/target/tilegx/cpu.h +++ b/target/tilegx/cpu.h @@ -164,7 +164,7 @@ static inline TileGXCPU *tilegx_env_get_cpu(CPUTLGState *env) void tilegx_tcg_init(void); int cpu_tilegx_signal_handler(int host_signum, void *pinfo, void *puc); -#define cpu_init(cpu_model) cpu_generic_init(TYPE_TILEGX_CPU, cpu_model) +#define CPU_RESOLVING_TYPE TYPE_TILEGX_CPU #define cpu_signal_handler cpu_tilegx_signal_handler diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 07b8b59f58..c3665c6ddd 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -413,10 +413,9 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, target_ulong *pc, *flags = 0; } -#define cpu_init(cpu_model) cpu_generic_init(TYPE_TRICORE_CPU, cpu_model) - #define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU #define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU /* helpers.c */ int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address, diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index 42e1d52478..735d3ae9dc 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -164,10 +164,9 @@ static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch) #include "exec/cpu-all.h" -#define cpu_init(cpu_model) cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model) - #define UNICORE32_CPU_TYPE_SUFFIX "-" TYPE_UNICORE32_CPU #define UNICORE32_CPU_TYPE_NAME(model) model UNICORE32_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_UNICORE32_CPU static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulong *pc, target_ulong *cs_base, uint32_t *flags) diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 957f0fd59a..e9d2e109f7 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -513,6 +513,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, #define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU #define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU #ifdef TARGET_WORDS_BIGENDIAN #define XTENSA_DEFAULT_CPU_MODEL "fsf" @@ -526,8 +527,6 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, #define XTENSA_DEFAULT_CPU_NOMMU_TYPE \ XTENSA_CPU_TYPE_NAME(XTENSA_DEFAULT_CPU_NOMMU_MODEL) -#define cpu_init(cpu_model) cpu_generic_init(TYPE_XTENSA_CPU, cpu_model) - void xtensa_translate_init(void); void xtensa_breakpoint_handler(CPUState *cs); void xtensa_finalize_config(XtensaConfig *config); diff --git a/tests/Makefile.include b/tests/Makefile.include index 412aed1737..0b277036df 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -400,6 +400,7 @@ check-qtest-s390x-y += tests/virtio-console-test$(EXESUF) check-qtest-s390x-y += tests/virtio-serial-test$(EXESUF) check-qtest-s390x-y += tests/cpu-plug-test$(EXESUF) +check-qtest-generic-y += tests/machine-none-test$(EXESUF) check-qtest-generic-y += tests/qom-test$(EXESUF) check-qtest-generic-y += tests/test-hmp$(EXESUF) @@ -797,6 +798,7 @@ tests/display-vga-test$(EXESUF): tests/display-vga-test.o tests/ipoctal232-test$(EXESUF): tests/ipoctal232-test.o tests/qom-test$(EXESUF): tests/qom-test.o tests/test-hmp$(EXESUF): tests/test-hmp.o +tests/machine-none-test$(EXESUF): tests/machine-none-test.o tests/drive_del-test$(EXESUF): tests/drive_del-test.o $(libqos-virtio-obj-y) tests/qdev-monitor-test$(EXESUF): tests/qdev-monitor-test.o $(libqos-pc-obj-y) tests/nvme-test$(EXESUF): tests/nvme-test.o diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c new file mode 100644 index 0000000000..efdd4be986 --- /dev/null +++ b/tests/machine-none-test.c @@ -0,0 +1,103 @@ +/* + * Machine 'none' tests. + * + * Copyright (c) 2018 Red Hat Inc. + * + * Authors: + * Igor Mammedov <imammedo@redhat.com>, + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" + +#include "qemu-common.h" +#include "qemu/cutils.h" +#include "libqtest.h" +#include "qapi/qmp/qdict.h" + + +struct arch2cpu { + const char *arch; + const char *cpu_model; +}; + +static struct arch2cpu cpus_map[] = { + /* tested targets list */ + { "arm", "cortex-a15" }, + { "aarch64", "cortex-a57" }, + { "x86_64", "qemu64,apic-id=0" }, + { "i386", "qemu32,apic-id=0" }, + { "alpha", "ev67" }, + { "cris", "crisv32" }, + { "lm32", "lm32-full" }, + { "m68k", "m5206" }, + /* FIXME: { "microblaze", "any" }, doesn't work with -M none -cpu any */ + /* FIXME: { "microblazeel", "any" }, doesn't work with -M none -cpu any */ + { "mips", "4Kc" }, + { "mipsel", "4Kc" }, + { "mips64", "20Kc" }, + { "mips64el", "20Kc" }, + { "moxie", "MoxieLite" }, + { "nios2", "FIXME" }, + { "or1k", "or1200" }, + { "ppc", "604" }, + { "ppc64", "power8e_v2.1" }, + { "ppcemb", "440epb" }, + { "s390x", "qemu" }, + { "sh4", "sh7750r" }, + { "sh4eb", "sh7751r" }, + { "sparc", "LEON2" }, + { "sparc64", "Fujitsu Sparc64" }, + { "tricore", "tc1796" }, + { "unicore32", "UniCore-II" }, + { "xtensa", "dc233c" }, + { "xtensaeb", "fsf" }, + { "hppa", "hppa" }, + { "riscv64", "rv64gcsu-v1.10.0" }, + { "riscv32", "rv32gcsu-v1.9.1" }, +}; + +static const char *get_cpu_model_by_arch(const char *arch) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cpus_map); i++) { + if (!strcmp(arch, cpus_map[i].arch)) { + return cpus_map[i].cpu_model; + } + } + return NULL; +} + +static void test_machine_cpu_cli(void) +{ + QDict *response; + const char *arch = qtest_get_arch(); + const char *cpu_model = get_cpu_model_by_arch(arch); + + if (!cpu_model) { + if (!(!strcmp(arch, "microblaze") || !strcmp(arch, "microblazeel"))) { + fprintf(stderr, "WARNING: cpu name for target '%s' isn't defined," + " add it to cpus_map\n", arch); + } + return; /* TODO: die here to force all targets have a test */ + } + global_qtest = qtest_startf("-machine none -cpu '%s'", cpu_model); + + response = qmp("{ 'execute': 'quit' }"); + g_assert(qdict_haskey(response, "return")); + QDECREF(response); + + qtest_quit(global_qtest); +} + +int main(int argc, char **argv) +{ + g_test_init(&argc, &argv, NULL); + + qtest_add_func("machine/none/cpu_option", test_machine_cpu_cli); + + return g_test_run(); +} @@ -4589,15 +4589,11 @@ int main(int argc, char **argv, char **envp) current_machine->maxram_size = maxram_size; current_machine->ram_slots = ram_slots; current_machine->boot_order = boot_order; - current_machine->cpu_model = cpu_model; /* parse features once if machine provides default cpu_type */ - if (machine_class->default_cpu_type) { - current_machine->cpu_type = machine_class->default_cpu_type; - if (cpu_model) { - current_machine->cpu_type = - cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model); - } + current_machine->cpu_type = machine_class->default_cpu_type; + if (cpu_model) { + current_machine->cpu_type = parse_cpu_model(cpu_model); } parse_numa_opts(current_machine); |