diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-24 22:00:13 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-24 22:00:13 +0000 |
| commit | 44cbbf18b946030d7445a324aa42f624031b0639 (patch) | |
| tree | 5d285b922e9eb523ee9151efbc87606b58dd9c26 | |
| parent | 6070dd07e91bc8621e506e80057bd07b5c76c970 (diff) | |
Fix malta emulation for 64bit qemu.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2355 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | hw/mips_malta.c | 25 | ||||
| -rw-r--r-- | hw/mips_r4k.c | 8 |
2 files changed, 20 insertions, 13 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 7ddf2fd175..c37c360843 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -24,16 +24,21 @@ #include "vl.h" -#define BIOS_FILENAME "mips_bios.bin" +#ifdef TARGET_WORDS_BIGENDIAN +#define BIOS_FILENAME "mips_bios.bin" +#else +#define BIOS_FILENAME "mipsel_bios.bin" +#endif + #ifdef MIPS_HAS_MIPS64 -#define INITRD_LOAD_ADDR (uint64_t)0x80800000 -#define ENVP_ADDR (uint64_t)0x80002000 +#define INITRD_LOAD_ADDR (int64_t)0x80800000 +#define ENVP_ADDR (int64_t)0x80002000 #else -#define INITRD_LOAD_ADDR (uint32_t)0x80800000 -#define ENVP_ADDR (uint32_t)0x80002000 +#define INITRD_LOAD_ADDR (int32_t)0x80800000 +#define ENVP_ADDR (int32_t)0x80002000 #endif -#define VIRT_TO_PHYS_ADDEND (-((uint64_t)(uint32_t)0x80000000)) +#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000)) #define ENVP_NB_ENTRIES 16 #define ENVP_ENTRY_SIZE 256 @@ -156,7 +161,8 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr) default: #if 0 - printf ("malta_fpga_read: Bad register offset 0x%x\n", (int)addr); + printf ("malta_fpga_read: Bad register offset 0x" TLSZ "\n", + addr); #endif break; } @@ -239,7 +245,8 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr, default: #if 0 - printf ("malta_fpga_write: Bad register offset 0x%x\n", (int)addr); + printf ("malta_fpga_write: Bad register offset 0x" TLSZ "\n", + addr); #endif break; } @@ -458,7 +465,7 @@ static int64_t load_kernel (CPUState *env) /* Store command line. */ prom_set(index++, env->kernel_filename); if (initrd_size > 0) - prom_set(index++, "rd_start=0x%08x rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); + prom_set(index++, "rd_start=0x" TLSZ " rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); else prom_set(index++, env->kernel_cmdline); diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index 5fa5b76a68..8d1cac9392 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -14,7 +14,7 @@ #else #define BIOS_FILENAME "mipsel_bios.bin" #endif -//#define BIOS_FILENAME "system.bin" + #ifdef MIPS_HAS_MIPS64 #define INITRD_LOAD_ADDR (int64_t)(int32_t)0x80800000 #else @@ -112,8 +112,8 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename, strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline); } - *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678); - *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size); + *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678); + *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size); } static void main_cpu_reset(void *opaque) @@ -159,7 +159,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); bios_size = load_image(buf, phys_ram_base + bios_offset); if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { - cpu_register_physical_memory((uint32_t)(0x1fc00000), + cpu_register_physical_memory(0x1fc00000, BIOS_SIZE, bios_offset | IO_MEM_ROM); } else { /* not fatal */ |