diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-03-10 14:56:29 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-10 14:56:29 +0000 |
| commit | 43a32ed68f3aac5ccde4fa6fa4a158e9e8153c94 (patch) | |
| tree | f3e9c323d3892f6d2361e6e9450065f67dd310cc | |
| parent | b29c8f115de5f48f0019afc2c779cf64e5fcefaf (diff) | |
pxa2xx: Don't shift into sign bit
Add missing 'U' suffixes to avoid potentially shifting into
the sign bit of a signed integer.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1392988008-15938-2-git-send-email-peter.maydell@linaro.org
| -rw-r--r-- | hw/arm/pxa2xx.c | 6 | ||||
| -rw-r--r-- | hw/arm/pxa2xx_gpio.c | 2 | ||||
| -rw-r--r-- | hw/arm/pxa2xx_pic.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 904277a9da..04291488e4 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -259,7 +259,7 @@ static void pxa2xx_pwrmode_write(CPUARMState *env, const ARMCPRegInfo *ri, case 1: /* Idle */ - if (!(s->cm_regs[CCCR >> 2] & (1 << 31))) { /* CPDIS */ + if (!(s->cm_regs[CCCR >> 2] & (1U << 31))) { /* CPDIS */ cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_HALT); break; } @@ -496,7 +496,7 @@ typedef struct { #define SSCR0_SSE (1 << 7) #define SSCR0_RIM (1 << 22) #define SSCR0_TIM (1 << 23) -#define SSCR0_MOD (1 << 31) +#define SSCR0_MOD (1U << 31) #define SSCR0_DSS(x) (((((x) >> 16) & 0x10) | ((x) & 0xf)) + 1) #define SSCR1_RIE (1 << 0) #define SSCR1_TIE (1 << 1) @@ -1006,7 +1006,7 @@ static void pxa2xx_rtc_write(void *opaque, hwaddr addr, switch (addr) { case RTTR: - if (!(s->rttr & (1 << 31))) { + if (!(s->rttr & (1U << 31))) { pxa2xx_rtc_hzupdate(s); s->rttr = value; pxa2xx_rtc_alarm_update(s, s->rtsr); diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index ca77f56c9f..07274285ab 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -110,7 +110,7 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level) } bank = line >> 5; - mask = 1 << (line & 31); + mask = 1U << (line & 31); if (level) { s->status[bank] |= s->rising[bank] & mask & diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 345fa4a491..d37fb543e8 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -105,7 +105,7 @@ static inline uint32_t pxa2xx_pic_highest(PXA2xxPICState *s) { for (i = PXA2XX_PIC_SRCS - 1; i >= 0; i --) { irq = s->priority[i] & 0x3f; - if ((s->priority[i] & (1 << 31)) && irq < PXA2XX_PIC_SRCS) { + if ((s->priority[i] & (1U << 31)) && irq < PXA2XX_PIC_SRCS) { /* Source peripheral ID is valid. */ bit = 1 << (irq & 31); int_set = (irq >= 32); @@ -119,7 +119,7 @@ static inline uint32_t pxa2xx_pic_highest(PXA2xxPICState *s) { if (mask[int_set] & bit & ~s->is_fiq[int_set]) { /* IRQ asserted */ ichp &= 0x0000ffff; - ichp |= (1 << 31) | (irq << 16); + ichp |= (1U << 31) | (irq << 16); } } } |