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authorLaurent Vivier <laurent@vivier.eu>2016-01-16 23:40:50 +0100
committerLaurent Vivier <laurent@vivier.eu>2016-10-28 10:38:48 +0200
commit020a4659208a6f9a985881504fd4d3b44ab589be (patch)
tree4e87483d384ae6eab56433955243e43e487b10f5
parenteec37aec85af9f5fd59b534d20c86a775b8e7973 (diff)
target-m68k: or can manage word and byte operands
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net>
-rw-r--r--target-m68k/translate.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9734d05ecd..a6aaf5ea64 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1989,19 +1989,21 @@ DISAS_INSN(or)
TCGv dest;
TCGv src;
TCGv addr;
+ int opsize;
- reg = DREG(insn, 9);
+ opsize = insn_opsize(insn);
+ reg = gen_extend(DREG(insn, 9), opsize, 0);
dest = tcg_temp_new();
if (insn & 0x100) {
- SRC_EA(env, src, OS_LONG, 0, &addr);
+ SRC_EA(env, src, opsize, 0, &addr);
tcg_gen_or_i32(dest, src, reg);
- DEST_EA(env, insn, OS_LONG, dest, &addr);
+ DEST_EA(env, insn, opsize, dest, &addr);
} else {
- SRC_EA(env, src, OS_LONG, 0, NULL);
+ SRC_EA(env, src, opsize, 0, NULL);
tcg_gen_or_i32(dest, src, reg);
- tcg_gen_mov_i32(reg, dest);
+ gen_partset_reg(opsize, DREG(insn, 9), dest);
}
- gen_logic_cc(s, dest, OS_LONG);
+ gen_logic_cc(s, dest, opsize);
}
DISAS_INSN(suba)