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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-21 18:08:36 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-21 18:08:36 +0000
commitc6fdf5fca0149fbc2d05d8d5ad43e3686c37514e (patch)
tree90951b96a9a62fa7323387f6987136ce6fed70e9
parent1b1afeb95b1e31ca32b48b07ff862a7b885b3896 (diff)
Fix interrupt controller address masking
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2844 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--hw/slavio_intctl.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c
index 94a6c965c4..2d1f6552e0 100644
--- a/hw/slavio_intctl.c
+++ b/hw/slavio_intctl.c
@@ -58,7 +58,8 @@ typedef struct SLAVIO_INTCTLState {
} SLAVIO_INTCTLState;
#define INTCTL_MAXADDR 0xf
-#define INTCTLM_MAXADDR 0xf
+#define INTCTLM_MAXADDR 0x13
+#define INTCTLM_MASK 0x1f
static void slavio_check_interrupts(void *opaque);
// per-cpu interrupt controller
@@ -143,7 +144,7 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uin
SLAVIO_INTCTLState *s = opaque;
uint32_t saddr;
- saddr = (addr & INTCTLM_MAXADDR) >> 2;
+ saddr = (addr & INTCTLM_MASK) >> 2;
switch (saddr) {
case 2: // clear (enable)
// Force clear unused bits