diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2020-09-02 22:46:49 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-09-07 12:58:08 -0700 |
| commit | 64603d1efffc8fa0883656c371e6471f6269be92 (patch) | |
| tree | 09468a209efe1cb7b41305a985efa5eba2e36044 | |
| parent | e11bd71f89649da3cff439c030d2ccac0cc914e3 (diff) | |
target/microblaze: Renumber D_FLAG
ESS[DS] is bit 19 in the manual, but the manual uses big-endian bit
numbering. This corresponds to bit 12 in little-endian numbering.
Let the comment about matching the ESR be true by renumbering it.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/microblaze/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index a25a2b427f..32811f773d 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -264,10 +264,10 @@ struct CPUMBState { /* MSR_UM (1 << 11) */ /* MSR_VM (1 << 13) */ /* ESR_ESS_MASK [11:5] -- unwind into iflags for unaligned excp */ +#define D_FLAG (1 << 12) /* Bit in ESR. */ #define DRTI_FLAG (1 << 16) #define DRTE_FLAG (1 << 17) #define DRTB_FLAG (1 << 18) -#define D_FLAG (1 << 19) /* Bit in ESR. */ /* TB dependent CPUMBState. */ #define IFLAGS_TB_MASK (D_FLAG | BIMM_FLAG | IMM_FLAG | \ |