diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2019-04-29 17:36:00 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2019-04-29 17:36:00 +0100 |
commit | 60fba59a2f9a092a44b688df5d058cdd6dd9c276 (patch) | |
tree | 58b17dff691b68847baf9eb4555068b0fe0b854f | |
parent | 3cd6726f0ba7cc77342ee721bd86094e13b2a42a (diff) |
target/arm: Clean excReturn bits when tail chaining
The TailChain() pseudocode specifies that a tail chaining
exception should sanitize the excReturn all-ones bits and
(if there is no FPU) the excReturn FType bits; we weren't
doing this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190416125744.27770-14-peter.maydell@linaro.org
-rw-r--r-- | target/arm/helper.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 088852ceb9..da0b620240 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8076,6 +8076,14 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain, qemu_log_mask(CPU_LOG_INT, "...taking pending %s exception %d\n", targets_secure ? "secure" : "nonsecure", exc); + if (dotailchain) { + /* Sanitize LR FType and PREFIX bits */ + if (!arm_feature(env, ARM_FEATURE_VFP)) { + lr |= R_V7M_EXCRET_FTYPE_MASK; + } + lr = deposit32(lr, 24, 8, 0xff); + } + if (arm_feature(env, ARM_FEATURE_V8)) { if (arm_feature(env, ARM_FEATURE_M_SECURITY) && (lr & R_V7M_EXCRET_S_MASK)) { |