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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-08-10 22:14:22 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-08-10 22:14:22 +0000
commit38e584a07279fffcfbfcafb207ce842edd093033 (patch)
tree574d309b088a86987dd8bab48844d71996fdb76e
parent313aa567104a63fbe84d6ec2eeff5b5c81cb3524 (diff)
m68k host port (Richard Zidlicky)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@357 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--Makefile.target5
-rwxr-xr-xconfigure8
-rw-r--r--cpu-exec.c17
-rw-r--r--dyngen-exec.h11
-rw-r--r--dyngen.c57
-rw-r--r--dyngen.h8
-rw-r--r--exec.h12
-rw-r--r--m68k.ld177
8 files changed, 293 insertions, 2 deletions
diff --git a/Makefile.target b/Makefile.target
index db72eeb080..27c79e8ca7 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -79,6 +79,11 @@ OP_CFLAGS=$(CFLAGS) -mno-sched-prolog
LDFLAGS+=-Wl,-T,$(SRC_PATH)/arm.ld
endif
+ifeq ($(ARCH),m68k)
+OP_CFLAGS=$(CFLAGS) -fomit-frame-pointer
+LDFLAGS+=-Wl,-T,m68k.ld
+endif
+
ifeq ($(HAVE_GCC3_OPTIONS),yes)
# very important to generate a return at the end of every operation
OP_CFLAGS+=-fno-reorder-blocks -fno-optimize-sibling-calls
diff --git a/configure b/configure
index 2b830710a7..51f8bcc74e 100755
--- a/configure
+++ b/configure
@@ -56,6 +56,9 @@ case "$cpu" in
ia64)
cpu="ia64"
;;
+ m68k)
+ cpu="m68k"
+ ;;
*)
cpu="unknown"
;;
@@ -163,7 +166,7 @@ fi
else
# if cross compiling, cannot launch a program, so make a static guess
-if test "$cpu" = "powerpc" -o "$cpu" = "mips" -o "$cpu" = "s390" -o "$cpu" = "sparc" -o "$cpu" = "sparc64"; then
+if test "$cpu" = "powerpc" -o "$cpu" = "mips" -o "$cpu" = "s390" -o "$cpu" = "sparc" -o "$cpu" = "sparc64" -o "$cpu" = "m68k"; then
bigendian="yes"
fi
@@ -265,6 +268,9 @@ elif test "$cpu" = "sparc64" ; then
elif test "$cpu" = "ia64" ; then
echo "ARCH=ia64" >> $config_mak
echo "#define HOST_IA64 1" >> $config_h
+elif test "$cpu" = "m68k" ; then
+ echo "ARCH=m68k" >> config.mak
+ echo "#define HOST_M68K 1" >> $TMPH
else
echo "Unsupported CPU"
exit 1
diff --git a/cpu-exec.c b/cpu-exec.c
index ecab6ff11d..fe165dffdd 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -642,6 +642,23 @@ int cpu_signal_handler(int host_signum, struct siginfo *info,
&uc->uc_sigmask);
}
+#elif defined(__mc68000)
+
+int cpu_signal_handler(int host_signum, struct siginfo *info,
+ void *puc)
+{
+ struct ucontext *uc = puc;
+ unsigned long pc;
+ int is_write;
+
+ pc = uc->uc_mcontext.gregs[16];
+ /* XXX: compute is_write */
+ is_write = 0;
+ return handle_cpu_signal(pc, (unsigned long)info->si_addr,
+ is_write,
+ &uc->uc_sigmask);
+}
+
#else
#error host CPU specific signal handler needed
diff --git a/dyngen-exec.h b/dyngen-exec.h
index 46f4042f68..980e70ca99 100644
--- a/dyngen-exec.h
+++ b/dyngen-exec.h
@@ -109,6 +109,13 @@ extern int printf(const char *, ...);
#define AREG5 "$13"
#define AREG6 "$14"
#endif
+#ifdef __mc68000
+#define AREG0 "%a5"
+#define AREG1 "%a4"
+#define AREG2 "%d7"
+#define AREG3 "%d6"
+#define AREG4 "%d5"
+#endif
#ifdef __ia64__
#define AREG0 "r27"
#define AREG1 "r24"
@@ -178,4 +185,6 @@ extern int __op_jmp0, __op_jmp1;
#ifdef __arm__
#define EXIT_TB() asm volatile ("b exec_loop")
#endif
-
+#ifdef __mc68000
+#define EXIT_TB() asm volatile ("rts")
+#endif
diff --git a/dyngen.c b/dyngen.c
index df88dc2cc8..58d22d9750 100644
--- a/dyngen.c
+++ b/dyngen.c
@@ -86,6 +86,13 @@
#define elf_check_arch(x) ((x) == EM_ARM)
#define ELF_USES_RELOC
+#elif defined(HOST_M68K)
+
+#define ELF_CLASS ELFCLASS32
+#define ELF_ARCH EM_68K
+#define elf_check_arch(x) ((x) == EM_68K)
+#define ELF_USES_RELOCA
+
#else
#error unsupported CPU - please update the code
#endif
@@ -575,6 +582,21 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
relocs, nb_relocs);
break;
#endif
+ case EM_68K:
+ {
+ uint8_t *p;
+ p = (void *)(p_end - 2);
+ if (p == p_start)
+ error("empty code for %s", name);
+ // remove NOP's, probably added for alignment
+ while ((get16((uint16_t *)p) == 0x4e71) &&
+ (p>p_start))
+ p -= 2;
+ if (get16((uint16_t *)p) != 0x4e75)
+ error("rts expected at the end of %s", name);
+ copy_size = p - p_start;
+ }
+ break;
default:
error("unknown ELF architecture");
}
@@ -1062,6 +1084,41 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
}
}
}
+#elif defined(HOST_M68K)
+ {
+ char name[256];
+ int type;
+ int addend;
+ Elf32_Sym *sym;
+ for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
+ if (rel->r_offset >= start_offset &&
+ rel->r_offset < start_offset + copy_size) {
+ sym = &(symtab[ELFW(R_SYM)(rel->r_info)]);
+ sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
+ if (strstart(sym_name, "__op_param", &p)) {
+ snprintf(name, sizeof(name), "param%s", p);
+ } else {
+ snprintf(name, sizeof(name), "(long)(&%s)", sym_name);
+ }
+ type = ELF32_R_TYPE(rel->r_info);
+ addend = get32((uint32_t *)(text + rel->r_offset)) + rel->r_addend;
+ switch(type) {
+ case R_68K_32:
+ fprintf(outfile, " /* R_68K_32 RELOC, offset %x */\n", rel->r_offset) ;
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s + %#x;\n",
+ rel->r_offset - start_offset, name, addend );
+ break;
+ case R_68K_PC32:
+ fprintf(outfile, " /* R_68K_PC32 RELOC, offset %x */\n", rel->r_offset);
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s - (long)(gen_code_ptr + %#x) + %#x;\n",
+ rel->r_offset - start_offset, name, rel->r_offset - start_offset, /*sym->st_value+*/ addend);
+ break;
+ default:
+ error("unsupported m68k relocation (%d)", type);
+ }
+ }
+ }
+ }
#else
#error unsupported CPU
#endif
diff --git a/dyngen.h b/dyngen.h
index 47fe263e4b..cc38228b74 100644
--- a/dyngen.h
+++ b/dyngen.h
@@ -94,6 +94,14 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
}
#endif
+#ifdef __mc68000
+#include <asm/cachectl.h>
+static inline void flush_icache_range(unsigned long start, unsigned long stop)
+{
+ cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16);
+}
+#endif
+
#ifdef __alpha__
register int gp asm("$29");
diff --git a/exec.h b/exec.h
index 5c4e841a72..54571a232a 100644
--- a/exec.h
+++ b/exec.h
@@ -348,6 +348,18 @@ static inline int testandset (int *spinlock)
}
#endif
+#ifdef __mc68000
+static inline int testandset (int *p)
+{
+ char ret;
+ __asm__ __volatile__("tas %1; sne %0"
+ : "=r" (ret)
+ : "m" (p)
+ : "cc","memory");
+ return ret == 0;
+}
+#endif
+
typedef int spinlock_t;
#define SPIN_LOCK_UNLOCKED 0
diff --git a/m68k.ld b/m68k.ld
new file mode 100644
index 0000000000..28da902fd5
--- /dev/null
+++ b/m68k.ld
@@ -0,0 +1,177 @@
+/* Script for -z combreloc: combine and sort reloc sections */
+OUTPUT_FORMAT("elf32-m68k", "elf32-m68k",
+ "elf32-m68k")
+OUTPUT_ARCH(m68k)
+ENTRY(_start)
+SEARCH_DIR("/usr/local/m68k-linux/lib");
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = 0x60000000 + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
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+ *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+ *(.rel.fini)
+ *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
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+ the linker would then create the section even if it turns out to
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+ KEEP (*crtbegin.o(.dtors))
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+}