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| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-29 10:22:58 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-29 10:22:58 +0000 |
| commit | ef397e88e96d4a798bd190bcd0c43865c3725ae2 (patch) | |
| tree | 903c770ecc3dc1a46e998ae4f9c57d65ec905a1c | |
| parent | c4781a51a5f5e5ea2660d5373602c991fede7b5d (diff) | |
Temporary hack to avoid Qemu crash at PowerPC reset time.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3482 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | hw/ppc.c | 8 | ||||
| -rw-r--r-- | hw/ppc405_uc.c | 14 |
2 files changed, 18 insertions, 4 deletions
@@ -131,13 +131,17 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) case PPC6xx_INPUT_HRESET: /* Level sensitive - active low */ if (level) { -#if 0 // XXX: TOFIX #if defined(PPC_DEBUG_IRQ) if (loglevel & CPU_LOG_INT) { fprintf(logfile, "%s: reset the CPU\n", __func__); } #endif - cpu_reset(env); + env->interrupt_request |= CPU_INTERRUPT_EXITTB; + /* XXX: TOFIX */ +#if 0 + cpu_ppc_reset(env); +#else + qemu_system_reset_request(); #endif } break; diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c index 2857a1255e..efbc399d2d 100644 --- a/hw/ppc405_uc.c +++ b/hw/ppc405_uc.c @@ -2189,12 +2189,17 @@ void ppc40x_core_reset (CPUState *env) target_ulong dbsr; printf("Reset PowerPC core\n"); + env->interrupt_request |= CPU_INTERRUPT_EXITTB; + /* XXX: TOFIX */ +#if 0 cpu_ppc_reset(env); +#else + qemu_system_reset_request(); +#endif dbsr = env->spr[SPR_40x_DBSR]; dbsr &= ~0x00000300; dbsr |= 0x00000100; env->spr[SPR_40x_DBSR] = dbsr; - cpu_loop_exit(); } void ppc40x_chip_reset (CPUState *env) @@ -2202,13 +2207,18 @@ void ppc40x_chip_reset (CPUState *env) target_ulong dbsr; printf("Reset PowerPC chip\n"); + env->interrupt_request |= CPU_INTERRUPT_EXITTB; + /* XXX: TOFIX */ +#if 0 cpu_ppc_reset(env); +#else + qemu_system_reset_request(); +#endif /* XXX: TODO reset all internal peripherals */ dbsr = env->spr[SPR_40x_DBSR]; dbsr &= ~0x00000300; dbsr |= 0x00000200; env->spr[SPR_40x_DBSR] = dbsr; - cpu_loop_exit(); } void ppc40x_system_reset (CPUState *env) |