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| author | Aurelien Jarno <aurelien@aurel32.net> | 2012-11-24 15:07:01 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2012-11-26 17:00:11 +0100 |
| commit | a0a7068104cc9908d0875404b0fa2ebf46e40f97 (patch) | |
| tree | e90eeb1d424712b548d1bb6124d52efdfe29683b | |
| parent | 80ae416058d8941824f450343781183618555415 (diff) | |
target-i386: Enable SSSE3 TCG support
SSSE3 support has been added to TCG more than 4 years ago in commit
4242b1bd8acc19aaaacffdaad4ac23213d72a72b. It has been disabled by
mistake in commit 551a2dec8fa55006a68393b9d6fb63577d2b3f1c.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
| -rw-r--r-- | target-i386/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 4fdd4f72d2..c6c2ca03a1 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -315,7 +315,7 @@ typedef struct x86_def_t { /* missing: CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */ #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \ - CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \ + CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \ CPUID_EXT_HYPERVISOR) /* missing: CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST, |