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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-19 10:04:48 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-19 10:04:48 +0000
commitf617a9a6bb3b66e93d30f57e966f425e58cef8bc (patch)
treee3629c536e89951f23f392f3c437c8ba40897224
parent8a16d273887cce159fd1c30ee820ec30ef93e661 (diff)
Update TLB miss addresses
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4897 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-sparc/helper.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index baf761a056..7b13ee118a 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -449,6 +449,7 @@ static int get_physical_address_data(CPUState *env,
#ifdef DEBUG_MMU
printf("DMISS at 0x%" PRIx64 "\n", address);
#endif
+ env->dmmuregs[6] = (address & ~0x1fffULL) | (env->dmmuregs[1] & 0x1fff);
env->exception_index = TT_DMISS;
return 1;
}
@@ -507,6 +508,7 @@ static int get_physical_address_code(CPUState *env,
#ifdef DEBUG_MMU
printf("TMISS at 0x%" PRIx64 "\n", address);
#endif
+ env->immuregs[6] = (address & ~0x1fffULL) | (env->dmmuregs[1] & 0x1fff);
env->exception_index = TT_TMISS;
return 1;
}