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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-01-17 20:03:15 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-01-17 20:03:15 +0000
commit2c52c8169a35eb5d15f81fe456219da30cadfe83 (patch)
tree9a1fe28a0acb0730c70660e344b5886d0ee01eeb
parentf1770b3e1f0fa6d684cd5e306530491fbfa5e604 (diff)
Keep track of mips related issues.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2325 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-mips/TODO17
1 files changed, 17 insertions, 0 deletions
diff --git a/target-mips/TODO b/target-mips/TODO
new file mode 100644
index 0000000000..5dd1de39e0
--- /dev/null
+++ b/target-mips/TODO
@@ -0,0 +1,17 @@
+Unsolved issues/bugs in the mips/mipsel backend
+-----------------------------------------------
+
+- MIPS64:
+ - No 64bit TLB support
+ - no 64bit wide registers for FPU
+ - 64bit mul/div handling broken
+ - DM[FT]C not implemented
+
+- TLB fails cornercase at address wrap around
+- [ls][dw][lr] report broken (aligned) BadVAddr
+- Missing per-CPU instruction decoding, currently all implemented
+ instructions are regarded as valid
+- pcnet32 does not work for little endian emulation on big endian host
+ (probably not mips specific, but observable for mips-malta)
+
+- We fake firmware support instead of doing the real thing