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authorAlex Bennée <alex.bennee@linaro.org>2016-04-04 15:35:49 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2016-04-05 11:46:52 +0200
commitca47a926ad780d5cc91a205d25a859128cdf800e (patch)
treeabb3098a6ce88400688e8447174f53969a871d1b
parentccffff48c93c30733783b05cd1ef843a4c274653 (diff)
include/qemu/atomic: add compile time asserts
To be safely portable no atomic access should be trying to do more than the natural word width of the host. The most common abuse is trying to atomically access 64 bit values on a 32 bit host. This patch adds some QEMU_BUILD_BUG_ON to the __atomic instrinsic paths to create a build failure if (sizeof(*ptr) > sizeof(void *)). Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <1459780549-12942-3-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r--include/qemu/atomic.h58
1 files changed, 34 insertions, 24 deletions
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index 8f1d8d927d..5bc4d6cc47 100644
--- a/include/qemu/atomic.h
+++ b/include/qemu/atomic.h
@@ -42,30 +42,34 @@
* loads/stores past the atomic operation load/store. However there is
* no explicit memory barrier for the processor.
*/
-#define atomic_read(ptr) \
- ({ \
- typeof(*ptr) _val; \
- __atomic_load(ptr, &_val, __ATOMIC_RELAXED); \
- _val; \
+#define atomic_read(ptr) \
+ ({ \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
+ typeof(*ptr) _val; \
+ __atomic_load(ptr, &_val, __ATOMIC_RELAXED); \
+ _val; \
})
-#define atomic_set(ptr, i) do { \
- typeof(*ptr) _val = (i); \
- __atomic_store(ptr, &_val, __ATOMIC_RELAXED); \
+#define atomic_set(ptr, i) do { \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
+ typeof(*ptr) _val = (i); \
+ __atomic_store(ptr, &_val, __ATOMIC_RELAXED); \
} while(0)
/* Atomic RCU operations imply weak memory barriers */
-#define atomic_rcu_read(ptr) \
- ({ \
- typeof(*ptr) _val; \
- __atomic_load(ptr, &_val, __ATOMIC_CONSUME); \
- _val; \
+#define atomic_rcu_read(ptr) \
+ ({ \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
+ typeof(*ptr) _val; \
+ __atomic_load(ptr, &_val, __ATOMIC_CONSUME); \
+ _val; \
})
-#define atomic_rcu_set(ptr, i) do { \
- typeof(*ptr) _val = (i); \
- __atomic_store(ptr, &_val, __ATOMIC_RELEASE); \
+#define atomic_rcu_set(ptr, i) do { \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
+ typeof(*ptr) _val = (i); \
+ __atomic_store(ptr, &_val, __ATOMIC_RELEASE); \
} while(0)
/* atomic_mb_read/set semantics map Java volatile variables. They are
@@ -79,6 +83,7 @@
#if defined(_ARCH_PPC)
#define atomic_mb_read(ptr) \
({ \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
typeof(*ptr) _val; \
__atomic_load(ptr, &_val, __ATOMIC_RELAXED); \
smp_rmb(); \
@@ -86,22 +91,25 @@
})
#define atomic_mb_set(ptr, i) do { \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
typeof(*ptr) _val = (i); \
smp_wmb(); \
__atomic_store(ptr, &_val, __ATOMIC_RELAXED); \
smp_mb(); \
} while(0)
#else
-#define atomic_mb_read(ptr) \
- ({ \
- typeof(*ptr) _val; \
- __atomic_load(ptr, &_val, __ATOMIC_SEQ_CST); \
- _val; \
+#define atomic_mb_read(ptr) \
+ ({ \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
+ typeof(*ptr) _val; \
+ __atomic_load(ptr, &_val, __ATOMIC_SEQ_CST); \
+ _val; \
})
-#define atomic_mb_set(ptr, i) do { \
- typeof(*ptr) _val = (i); \
- __atomic_store(ptr, &_val, __ATOMIC_SEQ_CST); \
+#define atomic_mb_set(ptr, i) do { \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
+ typeof(*ptr) _val = (i); \
+ __atomic_store(ptr, &_val, __ATOMIC_SEQ_CST); \
} while(0)
#endif
@@ -109,6 +117,7 @@
/* All the remaining operations are fully sequentially consistent */
#define atomic_xchg(ptr, i) ({ \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
typeof(*ptr) _new = (i), _old; \
__atomic_exchange(ptr, &_new, &_old, __ATOMIC_SEQ_CST); \
_old; \
@@ -117,6 +126,7 @@
/* Returns the eventual value, failed or not */
#define atomic_cmpxchg(ptr, old, new) \
({ \
+ QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \
typeof(*ptr) _old = (old), _new = (new); \
__atomic_compare_exchange(ptr, &_old, &_new, false, \
__ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); \