diff options
author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-07-21 22:39:57 +0000 |
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committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-07-21 22:39:57 +0000 |
commit | d07edbfa0022c86567f3460378008a654e532820 (patch) | |
tree | 1565d1e727c134755aad35359808d6a094e069ea | |
parent | 059809e45160fda714edf645902db95e262886e9 (diff) |
Fix Arm cp15 c13 (Process ID) register writes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2067 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | target-arm/helper.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 60eee5c2c8..2ed46a29bb 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -494,10 +494,18 @@ void helper_set_cp15(CPUState *env, uint32_t insn, uint32_t val) case 13: /* Process ID. */ switch (op2) { case 0: - env->cp15.c9_data = val; + /* Unlike real hardware the qemu TLB uses virtual addresses, + not modified virtual addresses, so this causes a TLB flush. + */ + if (env->cp15.c13_fcse != val) + tlb_flush(env, 1); + env->cp15.c13_fcse = val; break; case 1: - env->cp15.c9_insn = val; + /* This changes the ASID, so do a TLB flush. */ + if (env->cp15.c13_context != val) + tlb_flush(env, 0); + env->cp15.c13_context = val; break; default: goto bad_reg; |