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authorAurelien Jarno <aurelien@aurel32.net>2010-02-28 14:11:06 +0100
committerAurelien Jarno <aurelien@aurel32.net>2010-02-28 14:11:06 +0100
commit6454e7be1b2504533f7ffb190d54ebe2993cb434 (patch)
treecd10813dd2cdb5aaf5b48168c8f95a3a2dba003c
parent5bb599023a6478e86152a2e8bc2b21775261b9da (diff)
target-ppc: stop translation after a trap instruction
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-ppc/translate.c20
1 files changed, 12 insertions, 8 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 0b11fda880..9da42404eb 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3618,8 +3618,9 @@ static void gen_sc(DisasContext *ctx)
static void gen_tw(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode));
- /* Update the nip since this might generate a trap exception */
- gen_update_nip(ctx, ctx->nip);
+ /* Stop the translation since this might generate a trap exception
+ and/or following instructions might be invalid */
+ gen_stop_exception(ctx);
gen_helper_tw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0);
tcg_temp_free_i32(t0);
}
@@ -3629,8 +3630,9 @@ static void gen_twi(DisasContext *ctx)
{
TCGv t0 = tcg_const_tl(SIMM(ctx->opcode));
TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode));
- /* Update the nip since this might generate a trap exception */
- gen_update_nip(ctx, ctx->nip);
+ /* Stop the translation since this might generate a trap exception
+ and/or following instructions might be invalid */
+ gen_stop_exception(ctx);
gen_helper_tw(cpu_gpr[rA(ctx->opcode)], t0, t1);
tcg_temp_free(t0);
tcg_temp_free_i32(t1);
@@ -3641,8 +3643,9 @@ static void gen_twi(DisasContext *ctx)
static void gen_td(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode));
- /* Update the nip since this might generate a trap exception */
- gen_update_nip(ctx, ctx->nip);
+ /* Stop the translation since this might generate a trap exception
+ and/or following instructions might be invalid */
+ gen_stop_exception(ctx);
gen_helper_td(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0);
tcg_temp_free_i32(t0);
}
@@ -3652,8 +3655,9 @@ static void gen_tdi(DisasContext *ctx)
{
TCGv t0 = tcg_const_tl(SIMM(ctx->opcode));
TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode));
- /* Update the nip since this might generate a trap exception */
- gen_update_nip(ctx, ctx->nip);
+ /* Stop the translation since this might generate a trap exception
+ and/or following instructions might be invalid */
+ gen_stop_exception(ctx);
gen_helper_td(cpu_gpr[rA(ctx->opcode)], t0, t1);
tcg_temp_free(t0);
tcg_temp_free_i32(t1);