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author | Peter Maydell <peter.maydell@linaro.org> | 2024-04-09 22:29:46 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2024-04-09 22:29:46 +0100 |
commit | fee571c7afced9bf4b01b864ea6e85f00fb50e30 (patch) | |
tree | 9b15e156bd4bc15b12ffafe0a50e8dfc888c6395 /.gdbinit | |
parent | 927284d65bce63ab1495d3febe7c7b5b6d563874 (diff) | |
parent | 143bcc1d59f174b6c6743bd4ca8f99415ed1aba2 (diff) |
Merge tag 'pull-misc-20240409' of https://gitlab.com/rth7680/qemu into staging
target/m68k: Fix fp accrued exception reporting
target/hppa: Fix IIAOQ, IIASQ for pa2.0
target/sh4: Fixes to mac.l and mac.w saturation
target/sh4: Fixes to illegal delay slot reporting
linux-user: Fix waitid return of siginfo_t and rusage
linux-user: Preserve unswapped siginfo_t for strace
tcg/optimize: Do not attempt to constant fold neg_vec
accel/tcg: Improve can_do_io management, mmio bug fix
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* tag 'pull-misc-20240409' of https://gitlab.com/rth7680/qemu:
linux-user: Preserve unswapped siginfo_t for strace
accel/tcg: Improve can_do_io management
target/s390x: Use insn_start from DisasContextBase
target/riscv: Use insn_start from DisasContextBase
target/microblaze: Use insn_start from DisasContextBase
target/i386: Preserve DisasContextBase.insn_start across rewind
target/hppa: Use insn_start from DisasContextBase
target/arm: Use insn_start from DisasContextBase
accel/tcg: Add insn_start to DisasContextBase
tcg: Add TCGContext.emit_before_op
target/m68k: Map FPU exceptions to FPSR register
target/sh4: add missing CHECK_NOT_DELAY_SLOT
target/sh4: Fix mac.w with saturation enabled
target/sh4: Fix mac.l with saturation enabled
target/sh4: Merge mach and macl into a union
target/sh4: mac.w: memory accesses are 16-bit words
target/hppa: Fix IIAOQ, IIASQ for pa2.0
linux-user: replace calloc() with g_new0()
linux-user: Fix waitid return of siginfo_t and rusage
tcg/optimize: Do not attempt to constant fold neg_vec
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to '.gdbinit')
0 files changed, 0 insertions, 0 deletions