diff options
author | Henry Wertz <hwertz10@gmail.com> | 2018-04-17 12:06:23 -1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2018-05-01 11:56:07 -0700 |
commit | 3f814b803797c007abfe5c4041de754e01723031 (patch) | |
tree | e8c1e48fc55886ea9ef9e822133151ac4dcba65a /.exrc | |
parent | d103021269ca9307ed7ca0d845d2b9e6c387509a (diff) |
tcg/arm: Fix memory barrier encoding
I found with qemu 2.11.x or newer that I would get an illegal instruction
error running some Intel binaries on my ARM chromebook. On investigation,
I found it was quitting on memory barriers.
qemu instruction:
mb $0x31
was translating as:
0x604050cc: 5bf07ff5 blpl #0x600250a8
After patch it gives:
0x604050cc: f57ff05b dmb ish
In short, I found INSN_DMB_ISH (memory barrier for ARMv7) appeared to be
correct based on online docs, but due to some endian-related shenanigans it
had to be byte-swapped to suit qemu; it appears INSN_DMB_MCR (memory
barrier for ARMv6) also should be byte swapped (and this patch does so).
I have not checked for correctness of aarch64's barrier instruction.
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Henry Wertz <hwertz10@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to '.exrc')
0 files changed, 0 insertions, 0 deletions