From fd672e3c99b4248a3f1b06bd067e5828340e7f96 Mon Sep 17 00:00:00 2001 From: Andre Barboza Date: Mon, 28 Oct 2013 15:53:11 +0100 Subject: development/gplcver: Added (open-source Verilog simulator). Signed-off-by: Matteo Bernardini --- development/gplcver/gplcver.info | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 development/gplcver/gplcver.info (limited to 'development/gplcver/gplcver.info') diff --git a/development/gplcver/gplcver.info b/development/gplcver/gplcver.info new file mode 100644 index 0000000000000..70954b6e33f41 --- /dev/null +++ b/development/gplcver/gplcver.info @@ -0,0 +1,10 @@ +PRGNAM="gplcver" +VERSION="2.12a" +HOMEPAGE="http://sourceforge.net/projects/gplcver/" +DOWNLOAD="http://downloads.sourceforge.net/gplcver/gplcver-2.12a.src.tar.bz2" +MD5SUM="857a15a9ebc8ef63ece01502509cbeb7" +DOWNLOAD_x86_64="" +MD5SUM_x86_64="" +REQUIRES="" +MAINTAINER="Andre Barboza" +EMAIL="bmg.andre@gmail.com" -- cgit v1.2.3