blob: b69492b29d5ace1f15aeda1cf10488e02855ea95 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
|
/*
* Nordic Semiconductor nRF51 SoC
*
* Copyright 2018 Joel Stanley <joel@jms.id.au>
*
* This code is licensed under the GPL version 2 or later. See
* the COPYING file in the top-level directory.
*/
#ifndef NRF51_SOC_H
#define NRF51_SOC_H
#include "hw/sysbus.h"
#include "hw/arm/armv7m.h"
#include "hw/char/nrf51_uart.h"
#include "hw/misc/nrf51_rng.h"
#include "hw/gpio/nrf51_gpio.h"
#include "hw/nvram/nrf51_nvm.h"
#include "hw/timer/nrf51_timer.h"
#include "qom/object.h"
#define TYPE_NRF51_SOC "nrf51-soc"
typedef struct NRF51State NRF51State;
DECLARE_INSTANCE_CHECKER(NRF51State, NRF51_SOC,
TYPE_NRF51_SOC)
#define NRF51_NUM_TIMERS 3
struct NRF51State {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
ARMv7MState cpu;
NRF51UARTState uart;
NRF51RNGState rng;
NRF51NVMState nvm;
NRF51GPIOState gpio;
NRF51TimerState timer[NRF51_NUM_TIMERS];
MemoryRegion iomem;
MemoryRegion sram;
MemoryRegion flash;
MemoryRegion clock;
MemoryRegion twi;
uint32_t sram_size;
uint32_t flash_size;
MemoryRegion *board_memory;
MemoryRegion container;
};
#endif
|
