From 8640cc11a8b619da79fe354ee54a7ebcc207088f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:47:50 -0300 Subject: sdhci: add qtest to check the SD capabilities register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The PCI model is tested with the pc/x86_64 machine, the SysBus model with the smdkc210/arm machine. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Paolo Bonzini Message-Id: <20180208164818.7961-3-f4bug@amsat.org> --- tests/Makefile.include | 3 ++ tests/sdhci-test.c | 143 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 146 insertions(+) create mode 100644 tests/sdhci-test.c (limited to 'tests') diff --git a/tests/Makefile.include b/tests/Makefile.include index f41da235ae..52be9b3fa5 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -294,6 +294,7 @@ check-qtest-i386-y += tests/migration-test$(EXESUF) check-qtest-i386-y += tests/test-x86-cpuid-compat$(EXESUF) check-qtest-i386-y += tests/numa-test$(EXESUF) check-qtest-x86_64-y += $(check-qtest-i386-y) +check-qtest-x86_64-y += tests/sdhci-test$(EXESUF) gcov-files-i386-y += i386-softmmu/hw/timer/mc146818rtc.c gcov-files-x86_64-y = $(subst i386-softmmu/,x86_64-softmmu/,$(gcov-files-i386-y)) @@ -367,6 +368,7 @@ gcov-files-arm-y += arm-softmmu/hw/block/virtio-blk.c check-qtest-arm-y += tests/test-arm-mptimer$(EXESUF) gcov-files-arm-y += hw/timer/arm_mptimer.c check-qtest-arm-y += tests/boot-serial-test$(EXESUF) +check-qtest-arm-y += tests/sdhci-test$(EXESUF) check-qtest-aarch64-y = tests/numa-test$(EXESUF) @@ -822,6 +824,7 @@ tests/test-arm-mptimer$(EXESUF): tests/test-arm-mptimer.o tests/test-qapi-util$(EXESUF): tests/test-qapi-util.o $(test-util-obj-y) tests/numa-test$(EXESUF): tests/numa-test.o tests/vmgenid-test$(EXESUF): tests/vmgenid-test.o tests/boot-sector.o tests/acpi-utils.o +tests/sdhci-test$(EXESUF): tests/sdhci-test.o $(libqos-pc-obj-y) tests/migration/stress$(EXESUF): tests/migration/stress.o $(call quiet-command, $(LINKPROG) -static -O3 $(PTHREAD_LIB) -o $@ $< ,"LINK","$(TARGET_DIR)$@") diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c new file mode 100644 index 0000000000..0b4bfc403c --- /dev/null +++ b/tests/sdhci-test.c @@ -0,0 +1,143 @@ +/* + * QTest testcase for SDHCI controllers + * + * Written by Philippe Mathieu-Daudé + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "qemu/osdep.h" +#include "hw/registerfields.h" +#include "libqtest.h" +#include "libqos/pci-pc.h" +#include "hw/pci/pci.h" + +#define SDHC_CAPAB 0x40 +#define SDHC_HCVER 0xFE + +static const struct sdhci_t { + const char *arch, *machine; + struct { + uintptr_t addr; + uint8_t version; + uint8_t baseclock; + struct { + bool sdma; + uint64_t reg; + } capab; + } sdhci; + struct { + uint16_t vendor_id, device_id; + } pci; +} models[] = { + /* PC via PCI */ + { "x86_64", "pc", + {-1, 2, 0, {1, 0x057834b4} }, + .pci = { PCI_VENDOR_ID_REDHAT, PCI_DEVICE_ID_REDHAT_SDHCI } }, + + /* Exynos4210 */ + { "arm", "smdkc210", + {0x12510000, 2, 0, {1, 0x5e80080} } }, +}; + +typedef struct QSDHCI { + struct { + QPCIBus *bus; + QPCIDevice *dev; + } pci; + union { + QPCIBar mem_bar; + uint64_t addr; + }; +} QSDHCI; + +static uint64_t sdhci_readq(QSDHCI *s, uint32_t reg) +{ + uint64_t val; + + if (s->pci.dev) { + val = qpci_io_readq(s->pci.dev, s->mem_bar, reg); + } else { + val = qtest_readq(global_qtest, s->addr + reg); + } + + return val; +} + +static void check_capab_capareg(QSDHCI *s, uint64_t expec_capab) +{ + uint64_t capab; + + capab = sdhci_readq(s, SDHC_CAPAB); + g_assert_cmphex(capab, ==, expec_capab); +} + +static QSDHCI *machine_start(const struct sdhci_t *test) +{ + QSDHCI *s = g_new0(QSDHCI, 1); + + if (test->pci.vendor_id) { + /* PCI */ + uint16_t vendor_id, device_id; + uint64_t barsize; + + global_qtest = qtest_startf("-machine %s -device sdhci-pci", + test->machine); + + s->pci.bus = qpci_init_pc(NULL); + + /* Find PCI device and verify it's the right one */ + s->pci.dev = qpci_device_find(s->pci.bus, QPCI_DEVFN(4, 0)); + g_assert_nonnull(s->pci.dev); + vendor_id = qpci_config_readw(s->pci.dev, PCI_VENDOR_ID); + device_id = qpci_config_readw(s->pci.dev, PCI_DEVICE_ID); + g_assert(vendor_id == test->pci.vendor_id); + g_assert(device_id == test->pci.device_id); + s->mem_bar = qpci_iomap(s->pci.dev, 0, &barsize); + qpci_device_enable(s->pci.dev); + } else { + /* SysBus */ + global_qtest = qtest_startf("-machine %s", test->machine); + s->addr = test->sdhci.addr; + } + + return s; +} + +static void machine_stop(QSDHCI *s) +{ + g_free(s->pci.dev); + qtest_quit(global_qtest); +} + +static void test_machine(const void *data) +{ + const struct sdhci_t *test = data; + QSDHCI *s; + + s = machine_start(test); + + check_capab_capareg(s, test->sdhci.capab.reg); + + machine_stop(s); +} + +int main(int argc, char *argv[]) +{ + const char *arch = qtest_get_arch(); + char *name; + int i; + + g_test_init(&argc, &argv, NULL); + for (i = 0; i < ARRAY_SIZE(models); i++) { + if (strcmp(arch, models[i].arch)) { + continue; + } + name = g_strdup_printf("sdhci/%s", models[i].machine); + qtest_add_data_func(name, &models[i], test_machine); + g_free(name); + } + + return g_test_run(); +} -- cgit v1.2.3 From 556f9aca7f3d716185ebb05527ac3efb9709d4a5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:47:51 -0300 Subject: sdhci: add check_capab_readonly() qtest MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Hajnoczi Message-Id: <20180208164818.7961-4-f4bug@amsat.org> --- tests/sdhci-test.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'tests') diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index 0b4bfc403c..8272c44221 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -65,6 +65,15 @@ static uint64_t sdhci_readq(QSDHCI *s, uint32_t reg) return val; } +static void sdhci_writeq(QSDHCI *s, uint32_t reg, uint64_t val) +{ + if (s->pci.dev) { + qpci_io_writeq(s->pci.dev, s->mem_bar, reg, val); + } else { + qtest_writeq(global_qtest, s->addr + reg, val); + } +} + static void check_capab_capareg(QSDHCI *s, uint64_t expec_capab) { uint64_t capab; @@ -73,6 +82,20 @@ static void check_capab_capareg(QSDHCI *s, uint64_t expec_capab) g_assert_cmphex(capab, ==, expec_capab); } +static void check_capab_readonly(QSDHCI *s) +{ + const uint64_t vrand = 0x123456789abcdef; + uint64_t capab0, capab1; + + capab0 = sdhci_readq(s, SDHC_CAPAB); + g_assert_cmpuint(capab0, !=, vrand); + + sdhci_writeq(s, SDHC_CAPAB, vrand); + capab1 = sdhci_readq(s, SDHC_CAPAB); + g_assert_cmpuint(capab1, !=, vrand); + g_assert_cmpuint(capab1, ==, capab0); +} + static QSDHCI *machine_start(const struct sdhci_t *test) { QSDHCI *s = g_new0(QSDHCI, 1); @@ -119,6 +142,7 @@ static void test_machine(const void *data) s = machine_start(test); check_capab_capareg(s, test->sdhci.capab.reg); + check_capab_readonly(s); machine_stop(s); } -- cgit v1.2.3 From 0c78f51eb4ac0bfaca7278f16d918052805d2ed8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:47:52 -0300 Subject: sdhci: add a check_capab_baseclock() qtest MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Hajnoczi Message-Id: <20180208164818.7961-5-f4bug@amsat.org> --- tests/sdhci-test.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'tests') diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index 8272c44221..f70c3a6d88 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -14,6 +14,7 @@ #include "hw/pci/pci.h" #define SDHC_CAPAB 0x40 +FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */ #define SDHC_HCVER 0xFE static const struct sdhci_t { @@ -96,6 +97,18 @@ static void check_capab_readonly(QSDHCI *s) g_assert_cmpuint(capab1, ==, capab0); } +static void check_capab_baseclock(QSDHCI *s, uint8_t expec_freq) +{ + uint64_t capab, capab_freq; + + if (!expec_freq) { + return; + } + capab = sdhci_readq(s, SDHC_CAPAB); + capab_freq = FIELD_EX64(capab, SDHC_CAPAB, BASECLKFREQ); + g_assert_cmpuint(capab_freq, ==, expec_freq); +} + static QSDHCI *machine_start(const struct sdhci_t *test) { QSDHCI *s = g_new0(QSDHCI, 1); @@ -143,6 +156,7 @@ static void test_machine(const void *data) check_capab_capareg(s, test->sdhci.capab.reg); check_capab_readonly(s); + check_capab_baseclock(s, test->sdhci.baseclock); machine_stop(s); } -- cgit v1.2.3 From bc13038f3a2c7c9ddc1b33757fdcb152d1fbd5dc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:47:53 -0300 Subject: sdhci: add a check_capab_sdma() qtest MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Hajnoczi Message-Id: <20180208164818.7961-6-f4bug@amsat.org> --- tests/sdhci-test.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'tests') diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index f70c3a6d88..34d1c0d137 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -15,6 +15,7 @@ #define SDHC_CAPAB 0x40 FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */ +FIELD(SDHC_CAPAB, SDMA, 22, 1); #define SDHC_HCVER 0xFE static const struct sdhci_t { @@ -109,6 +110,15 @@ static void check_capab_baseclock(QSDHCI *s, uint8_t expec_freq) g_assert_cmpuint(capab_freq, ==, expec_freq); } +static void check_capab_sdma(QSDHCI *s, bool supported) +{ + uint64_t capab, capab_sdma; + + capab = sdhci_readq(s, SDHC_CAPAB); + capab_sdma = FIELD_EX64(capab, SDHC_CAPAB, SDMA); + g_assert_cmpuint(capab_sdma, ==, supported); +} + static QSDHCI *machine_start(const struct sdhci_t *test) { QSDHCI *s = g_new0(QSDHCI, 1); @@ -156,6 +166,7 @@ static void test_machine(const void *data) check_capab_capareg(s, test->sdhci.capab.reg); check_capab_readonly(s); + check_capab_sdma(s, test->sdhci.capab.sdma); check_capab_baseclock(s, test->sdhci.baseclock); machine_stop(s); -- cgit v1.2.3 From efe9d52405846f7ad023e7ec5933dcc2568f5a42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:47:54 -0300 Subject: sdhci: add qtest to check the SD Spec version MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Hajnoczi Message-Id: <20180208164818.7961-7-f4bug@amsat.org> --- tests/sdhci-test.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'tests') diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index 34d1c0d137..4d8642627d 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -54,6 +54,19 @@ typedef struct QSDHCI { }; } QSDHCI; +static uint16_t sdhci_readw(QSDHCI *s, uint32_t reg) +{ + uint16_t val; + + if (s->pci.dev) { + val = qpci_io_readw(s->pci.dev, s->mem_bar, reg); + } else { + val = qtest_readw(global_qtest, s->addr + reg); + } + + return val; +} + static uint64_t sdhci_readq(QSDHCI *s, uint32_t reg) { uint64_t val; @@ -76,6 +89,16 @@ static void sdhci_writeq(QSDHCI *s, uint32_t reg, uint64_t val) } } +static void check_specs_version(QSDHCI *s, uint8_t version) +{ + uint32_t v; + + v = sdhci_readw(s, SDHC_HCVER); + v &= 0xff; + v += 1; + g_assert_cmpuint(v, ==, version); +} + static void check_capab_capareg(QSDHCI *s, uint64_t expec_capab) { uint64_t capab; @@ -164,6 +187,7 @@ static void test_machine(const void *data) s = machine_start(test); + check_specs_version(s, test->sdhci.version); check_capab_capareg(s, test->sdhci.capab.reg); check_capab_readonly(s); check_capab_sdma(s, test->sdhci.capab.sdma); -- cgit v1.2.3 From 27a49d3be627807734f0e2f3e30315cb5235ea76 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:48:04 -0300 Subject: hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit checking Xilinx datasheet "UG585" (v1.12.1) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-Id: <20180208164818.7961-17-f4bug@amsat.org> --- tests/sdhci-test.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'tests') diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index 4d8642627d..b0c23505c7 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -41,6 +41,11 @@ static const struct sdhci_t { /* Exynos4210 */ { "arm", "smdkc210", {0x12510000, 2, 0, {1, 0x5e80080} } }, + + /* Zynq-7000 */ + { "arm", "xilinx-zynq-a9", /* Datasheet: UG585 (v1.12.1) */ + {0xe0100000, 2, 0, {1, 0x69ec0080} } }, + }; typedef struct QSDHCI { -- cgit v1.2.3 From 09b9428db496fe9b497d27081f2904e76dc65277 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:48:16 -0300 Subject: sdhci: check Spec v3 capabilities qtest MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Acked-by: Alistair Francis Message-Id: <20180208164818.7961-29-f4bug@amsat.org> --- tests/Makefile.include | 1 + tests/sdhci-test.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) (limited to 'tests') diff --git a/tests/Makefile.include b/tests/Makefile.include index 52be9b3fa5..278c13aa93 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -371,6 +371,7 @@ check-qtest-arm-y += tests/boot-serial-test$(EXESUF) check-qtest-arm-y += tests/sdhci-test$(EXESUF) check-qtest-aarch64-y = tests/numa-test$(EXESUF) +check-qtest-aarch64-y += tests/sdhci-test$(EXESUF) check-qtest-microblazeel-y = $(check-qtest-microblaze-y) diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index b0c23505c7..2474179bf4 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -42,10 +42,22 @@ static const struct sdhci_t { { "arm", "smdkc210", {0x12510000, 2, 0, {1, 0x5e80080} } }, + /* i.MX 6 */ + { "arm", "sabrelite", + {0x02190000, 3, 0, {1, 0x057834b4} } }, + + /* BCM2835 */ + { "arm", "raspi2", + {0x3f300000, 3, 52, {0, 0x052134b4} } }, + /* Zynq-7000 */ { "arm", "xilinx-zynq-a9", /* Datasheet: UG585 (v1.12.1) */ {0xe0100000, 2, 0, {1, 0x69ec0080} } }, + /* ZynqMP */ + { "aarch64", "xlnx-zcu102", /* Datasheet: UG1085 (v1.7) */ + {0xff160000, 3, 0, {1, 0x280737ec6481} } }, + }; typedef struct QSDHCI { -- cgit v1.2.3 From f18e6d50e2b42410699ccffcf42d5c420bc5302b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:48:17 -0300 Subject: sdhci: add a check_capab_v3() qtest MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Hajnoczi Message-Id: <20180208164818.7961-30-f4bug@amsat.org> --- tests/sdhci-test.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'tests') diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index 2474179bf4..493023fd0c 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -16,6 +16,8 @@ #define SDHC_CAPAB 0x40 FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */ FIELD(SDHC_CAPAB, SDMA, 22, 1); +FIELD(SDHC_CAPAB, SDR, 32, 3); /* since v3 */ +FIELD(SDHC_CAPAB, DRIVER, 36, 3); /* since v3 */ #define SDHC_HCVER 0xFE static const struct sdhci_t { @@ -159,6 +161,20 @@ static void check_capab_sdma(QSDHCI *s, bool supported) g_assert_cmpuint(capab_sdma, ==, supported); } +static void check_capab_v3(QSDHCI *s, uint8_t version) +{ + uint64_t capab, capab_v3; + + if (version < 3) { + /* before v3 those fields are RESERVED */ + capab = sdhci_readq(s, SDHC_CAPAB); + capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, SDR); + g_assert_cmpuint(capab_v3, ==, 0); + capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, DRIVER); + g_assert_cmpuint(capab_v3, ==, 0); + } +} + static QSDHCI *machine_start(const struct sdhci_t *test) { QSDHCI *s = g_new0(QSDHCI, 1); @@ -207,6 +223,7 @@ static void test_machine(const void *data) check_specs_version(s, test->sdhci.version); check_capab_capareg(s, test->sdhci.capab.reg); check_capab_readonly(s); + check_capab_v3(s, test->sdhci.version); check_capab_sdma(s, test->sdhci.capab.sdma); check_capab_baseclock(s, test->sdhci.baseclock); -- cgit v1.2.3