From 29851ee7c8bd3fb8542e21cd0270c73132590350 Mon Sep 17 00:00:00 2001 From: Petar Jovanovic Date: Sun, 28 Apr 2013 03:18:36 +0200 Subject: target-mips: fix calculation of overflow for SHLL.PH and SHLL.QB This change corrects and simplifies how discard is calculated for shift left logical vector instructions. It is used to detect overflow and set bit 22 in the DSPControl register. The existing tests (shll_ph.c, shll_qb.c) are extended with the corner cases that expose incorrectness in the previous implementation. Signed-off-by: Petar Jovanovic Signed-off-by: Aurelien Jarno --- tests/tcg/mips/mips32-dsp/shll_ph.c | 33 ++++++++++++++++++++++++++++++++- tests/tcg/mips/mips32-dsp/shll_qb.c | 23 +++++++++++++++++++++-- 2 files changed, 53 insertions(+), 3 deletions(-) (limited to 'tests/tcg/mips') diff --git a/tests/tcg/mips/mips32-dsp/shll_ph.c b/tests/tcg/mips/mips32-dsp/shll_ph.c index b8f1ff5285..5fa58ccf63 100644 --- a/tests/tcg/mips/mips32-dsp/shll_ph.c +++ b/tests/tcg/mips/mips32-dsp/shll_ph.c @@ -11,7 +11,38 @@ int main() resultdsp = 1; __asm - ("shll.ph %0, %2, 0x0B\n\t" + ("wrdsp $0\n\t" + "shll.ph %0, %2, 0x0B\n\t" + "rddsp %1\n\t" + : "=r"(rd), "=r"(dsp) + : "r"(rt) + ); + dsp = (dsp >> 22) & 0x01; + assert(dsp == resultdsp); + assert(rd == result); + + rt = 0x7fff8000; + result = 0xfffe0000; + resultdsp = 1; + + __asm + ("wrdsp $0\n\t" + "shll.ph %0, %2, 0x01\n\t" + "rddsp %1\n\t" + : "=r"(rd), "=r"(dsp) + : "r"(rt) + ); + dsp = (dsp >> 22) & 0x01; + assert(dsp == resultdsp); + assert(rd == result); + + rt = 0x00000001; + result = 0x00008000; + resultdsp = 1; + + __asm + ("wrdsp $0\n\t" + "shll.ph %0, %2, 0x0F\n\t" "rddsp %1\n\t" : "=r"(rd), "=r"(dsp) : "r"(rt) diff --git a/tests/tcg/mips/mips32-dsp/shll_qb.c b/tests/tcg/mips/mips32-dsp/shll_qb.c index 8c1b91c635..729716d626 100644 --- a/tests/tcg/mips/mips32-dsp/shll_qb.c +++ b/tests/tcg/mips/mips32-dsp/shll_qb.c @@ -11,12 +11,14 @@ int main() resultdsp = 0x00; __asm - ("shll.qb %0, %2, 0x00\n\t" + ("wrdsp $0\n\t" + "shll.qb %0, %2, 0x00\n\t" "rddsp %1\n\t" : "=r"(rd), "=r"(dsp) : "r"(rt) ); dsp = (dsp >> 22) & 0x01; + assert(dsp == resultdsp); assert(rd == result); rt = 0x87654321; @@ -24,12 +26,29 @@ int main() resultdsp = 0x01; __asm - ("shll.qb %0, %2, 0x03\n\t" + ("wrdsp $0\n\t" + "shll.qb %0, %2, 0x03\n\t" "rddsp %1\n\t" : "=r"(rd), "=r"(dsp) : "r"(rt) ); dsp = (dsp >> 22) & 0x01; + assert(dsp == resultdsp); + assert(rd == result); + + rt = 0x00000001; + result = 0x00000080; + resultdsp = 0x00; + + __asm + ("wrdsp $0\n\t" + "shll.qb %0, %2, 0x07\n\t" + "rddsp %1\n\t" + : "=r"(rd), "=r"(dsp) + : "r"(rt) + ); + dsp = (dsp >> 22) & 0x01; + assert(dsp == resultdsp); assert(rd == result); return 0; -- cgit v1.2.3