From d70080c4e37fc533fa10904b286f29449decc6f8 Mon Sep 17 00:00:00 2001
From: Jia Liu <proljc@gmail.com>
Date: Wed, 24 Oct 2012 22:17:13 +0800
Subject: target-mips: Add ASE DSP testcases
Add MIPS ASE DSP testcases.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
tests/tcg/mips/mips64-dsp/addq_qh.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
create mode 100644 tests/tcg/mips/mips64-dsp/addq_qh.c
(limited to 'tests/tcg/mips/mips64-dsp/addq_qh.c')
diff --git a/tests/tcg/mips/mips64-dsp/addq_qh.c b/tests/tcg/mips/mips64-dsp/addq_qh.c
new file mode 100644
index 0000000000..4b874afb8a
--- /dev/null
+++ b/tests/tcg/mips/mips64-dsp/addq_qh.c
@@ -0,0 +1,28 @@
+#include "io.h"
+
+int main(void)
+{
+ long long rd, rs, rt, result, dspreg, dspresult;
+
+ rs = 0x123456787FFF8010;
+ rt = 0x1111111100018000;
+ result = 0x2345678980000010;
+ dspresult = 0x1;
+
+ __asm
+ ("addq.qh %0, %2, %3\n\t"
+ "rddsp %1\n\t"
+ : "=r"(rd), "=r"(dspreg)
+ : "r"(rs), "r"(rt)
+ );
+
+ dspreg = ((dspreg >> 20) & 0x01);
+
+ if ((rd != result) || (dspreg != dspresult)) {
+ printf("addq.qh error\n");
+
+ return -1;
+ }
+
+ return 0;
+}
--
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