From f775f45ab866f8e2d26720de9cb3c8f0ba5684d3 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 19 Oct 2016 15:00:21 +1100 Subject: libqos: Add 64-bit PCI IO accessors Currently the libqos PCI layer includes accessor helpers for 8, 16 and 32 bit reads and writes. It's likely that we'll want 64-bit accesses in the future (plenty of modern peripherals will have 64-bit reigsters). This adds them. For PIO (not MMIO) accesses on the PC backend, this is implemented as two 32-bit ins or outs. That's not ideal but AFAICT x86 doesn't have 64-bit versions of in and out. This patch also converts the single current user of 64-bit accesses - virtio-pci.c to use the new mechanism, rather than a sequence of 8 byte reads. Signed-off-by: David Gibson Reviewed-by: Laurent Vivier Reviewed-by: Greg Kurz --- tests/libqos/pci.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'tests/libqos/pci.c') diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c index bdffeb3ec2..3021651ee4 100644 --- a/tests/libqos/pci.c +++ b/tests/libqos/pci.c @@ -262,6 +262,19 @@ uint32_t qpci_io_readl(QPCIDevice *dev, void *data) } } +uint64_t qpci_io_readq(QPCIDevice *dev, void *data) +{ + uintptr_t addr = (uintptr_t)data; + + if (addr < QPCI_PIO_LIMIT) { + return dev->bus->pio_readq(dev->bus, addr); + } else { + uint64_t val; + dev->bus->memread(dev->bus, addr, &val, sizeof(val)); + return le64_to_cpu(val); + } +} + void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value) { uintptr_t addr = (uintptr_t)data; @@ -297,6 +310,18 @@ void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value) } } +void qpci_io_writeq(QPCIDevice *dev, void *data, uint64_t value) +{ + uintptr_t addr = (uintptr_t)data; + + if (addr < QPCI_PIO_LIMIT) { + dev->bus->pio_writeq(dev->bus, addr, value); + } else { + value = cpu_to_le64(value); + dev->bus->memwrite(dev->bus, addr, &value, sizeof(value)); + } +} + void qpci_memread(QPCIDevice *dev, void *data, void *buf, size_t len) { uintptr_t addr = (uintptr_t)data; -- cgit v1.2.3