From 552672bae63dd2c470fc533f276b746bae90b813 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 28 Jan 2021 14:55:57 -1000 Subject: tcg/tci: Fix TCG_REG_R4 misusage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This was removed from tcg_target_reg_alloc_order and tcg_target_call_iarg_regs on the assumption that it was the stack. This was incorrectly copied from i386. For tci, the stack is R15. By adding R4 back to tcg_target_call_iarg_regs, adjust the other entries so that 6 (or 12) entries are still present in the array, and adjust the numbers in the interpreter. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tci.c | 8 ++++---- tcg/tci/tcg-target.c.inc | 7 +------ 2 files changed, 5 insertions(+), 10 deletions(-) (limited to 'tcg') diff --git a/tcg/tci.c b/tcg/tci.c index e0d815e4b2..935eb87330 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -511,14 +511,14 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_read_reg(regs, TCG_REG_R1), tci_read_reg(regs, TCG_REG_R2), tci_read_reg(regs, TCG_REG_R3), + tci_read_reg(regs, TCG_REG_R4), tci_read_reg(regs, TCG_REG_R5), tci_read_reg(regs, TCG_REG_R6), tci_read_reg(regs, TCG_REG_R7), tci_read_reg(regs, TCG_REG_R8), tci_read_reg(regs, TCG_REG_R9), tci_read_reg(regs, TCG_REG_R10), - tci_read_reg(regs, TCG_REG_R11), - tci_read_reg(regs, TCG_REG_R12)); + tci_read_reg(regs, TCG_REG_R11)); tci_write_reg(regs, TCG_REG_R0, tmp64); tci_write_reg(regs, TCG_REG_R1, tmp64 >> 32); #else @@ -526,8 +526,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_read_reg(regs, TCG_REG_R1), tci_read_reg(regs, TCG_REG_R2), tci_read_reg(regs, TCG_REG_R3), - tci_read_reg(regs, TCG_REG_R5), - tci_read_reg(regs, TCG_REG_R6)); + tci_read_reg(regs, TCG_REG_R4), + tci_read_reg(regs, TCG_REG_R5)); tci_write_reg(regs, TCG_REG_R0, tmp64); #endif break; diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 7e3bed811e..aba7f75ad1 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -181,9 +181,7 @@ static const int tcg_target_reg_alloc_order[] = { TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, -#if 0 /* used for TCG_REG_CALL_STACK */ TCG_REG_R4, -#endif TCG_REG_R5, TCG_REG_R6, TCG_REG_R7, @@ -206,19 +204,16 @@ static const int tcg_target_call_iarg_regs[] = { TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, -#if 0 /* used for TCG_REG_CALL_STACK */ TCG_REG_R4, -#endif TCG_REG_R5, - TCG_REG_R6, #if TCG_TARGET_REG_BITS == 32 /* 32 bit hosts need 2 * MAX_OPC_PARAM_IARGS registers. */ + TCG_REG_R6, TCG_REG_R7, TCG_REG_R8, TCG_REG_R9, TCG_REG_R10, TCG_REG_R11, - TCG_REG_R12, #endif }; -- cgit v1.2.3