From dfe36d24aa3b1ba92b6f798ea4d8c5ce75918276 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 26 Apr 2022 09:30:24 -0700 Subject: target/arm: Use tcg_constant for op_s_{rri,rxi}_rot Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20220426163043.100432-29-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'target') diff --git a/target/arm/translate.c b/target/arm/translate.c index 8476f259fc..223fd5fdfe 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5495,18 +5495,16 @@ static bool op_s_rri_rot(DisasContext *s, arg_s_rri_rot *a, void (*gen)(TCGv_i32, TCGv_i32, TCGv_i32), int logic_cc, StoreRegKind kind) { - TCGv_i32 tmp1, tmp2; + TCGv_i32 tmp1; uint32_t imm; imm = ror32(a->imm, a->rot); if (logic_cc && a->rot) { tcg_gen_movi_i32(cpu_CF, imm >> 31); } - tmp2 = tcg_const_i32(imm); tmp1 = load_reg(s, a->rn); - gen(tmp1, tmp1, tmp2); - tcg_temp_free_i32(tmp2); + gen(tmp1, tmp1, tcg_constant_i32(imm)); if (logic_cc) { gen_logic_CC(tmp1); @@ -5525,9 +5523,10 @@ static bool op_s_rxi_rot(DisasContext *s, arg_s_rri_rot *a, if (logic_cc && a->rot) { tcg_gen_movi_i32(cpu_CF, imm >> 31); } - tmp = tcg_const_i32(imm); - gen(tmp, tmp); + tmp = tcg_temp_new_i32(); + gen(tmp, tcg_constant_i32(imm)); + if (logic_cc) { gen_logic_CC(tmp); } -- cgit v1.2.3