From 87a4b270348c69a446ebcddc039bfae31b1675cb Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 20 Jan 2017 11:15:07 +0000 Subject: target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32() To run a VM in 32-bit EL1 our AArch32 interrupt handling code needs to be able to cope with VIRQ and VFIQ exceptions. These behave like IRQ and FIQ except that we don't need to try to route them to Monitor mode. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias --- target/arm/helper.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'target') diff --git a/target/arm/helper.c b/target/arm/helper.c index b3875c7c6e..ba72ebbb07 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6399,6 +6399,20 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs) } offset = 4; break; + case EXCP_VIRQ: + new_mode = ARM_CPU_MODE_IRQ; + addr = 0x18; + /* Disable IRQ and imprecise data aborts. */ + mask = CPSR_A | CPSR_I; + offset = 4; + break; + case EXCP_VFIQ: + new_mode = ARM_CPU_MODE_FIQ; + addr = 0x1c; + /* Disable FIQ, IRQ and imprecise data aborts. */ + mask = CPSR_A | CPSR_I | CPSR_F; + offset = 4; + break; case EXCP_SMC: new_mode = ARM_CPU_MODE_MON; addr = 0x08; -- cgit v1.2.3