From 3b3d7df545ff30762b169147398dbf90c42eb452 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 12 Sep 2023 17:47:56 -0700 Subject: accel/tcg: Move CPUNegativeOffsetState into CPUState Retain the separate structure to emphasize its importance. Enforce CPUArchState always follows CPUState without padding. Reviewed-by: Anton Johansson Signed-off-by: Richard Henderson --- target/alpha/cpu.h | 1 - target/arm/cpu.h | 1 - target/avr/cpu.h | 1 - target/cris/cpu.h | 1 - target/hexagon/cpu.h | 2 +- target/hppa/cpu.h | 1 - target/i386/cpu.h | 1 - target/loongarch/cpu.h | 1 - target/m68k/cpu.h | 1 - target/microblaze/cpu.h | 6 +++--- target/mips/cpu.h | 4 ++-- target/nios2/cpu.h | 1 - target/openrisc/cpu.h | 1 - target/ppc/cpu.h | 1 - target/riscv/cpu.h | 2 +- target/rx/cpu.h | 1 - target/s390x/cpu.h | 1 - target/sh4/cpu.h | 1 - target/sparc/cpu.h | 1 - target/tricore/cpu.h | 1 - target/xtensa/cpu.h | 3 +-- 21 files changed, 8 insertions(+), 25 deletions(-) (limited to 'target') diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 13306665af..e2a467ec17 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -263,7 +263,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUAlphaState env; /* This alarm doesn't exist in real hardware; we wish it did. */ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index bd55c5dabf..a9edfb8353 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -856,7 +856,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUARMState env; /* Coprocessor information */ diff --git a/target/avr/cpu.h b/target/avr/cpu.h index 7225174668..4ce22d8e4f 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -148,7 +148,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUAVRState env; }; diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 8e37c6e50d..676b8e93ca 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -178,7 +178,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUCRISState env; }; diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index daef5c3f00..10cd1efd57 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -141,7 +141,7 @@ struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; + CPUHexagonState env; bool lldb_compat; diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 730f35231a..798d0c26d7 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -237,7 +237,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUHPPAState env; QEMUTimer *alarm_timer; }; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index d3f377d48a..e1875466b9 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1901,7 +1901,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUX86State env; VMChangeStateEntry *vmsentry; diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index f125a8e49b..40e70a8119 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -375,7 +375,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPULoongArchState env; QEMUTimer timer; uint32_t phy_id; diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index cf70282717..20afb0c94d 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -168,7 +168,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUM68KState env; }; diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index f6cab6ce19..e43c49d4af 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -345,15 +345,15 @@ typedef struct { struct ArchCPU { /*< private >*/ CPUState parent_obj; - /*< public >*/ + + CPUMBState env; + bool ns_axi_dp; bool ns_axi_ip; bool ns_axi_dc; bool ns_axi_ic; - CPUNegativeOffsetState neg; - CPUMBState env; MicroBlazeCPUConfig cfg; }; diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 6d6af1f2a8..67f8e8b988 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1213,10 +1213,10 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ + CPUMIPSState env; + Clock *clock; Clock *count_div; /* Divider for CP0_Count clock */ - CPUNegativeOffsetState neg; - CPUMIPSState env; }; diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 477a3161fd..70b6377a4f 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -218,7 +218,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUNios2State env; bool diverr_present; diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index ce4d605eb7..334997e9a1 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -305,7 +305,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUOpenRISCState env; }; diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index d703a5f3c6..30392ebeee 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1317,7 +1317,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUPPCState env; int vcpu_id; diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 6316cbcc23..ef9cf21c0c 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -388,7 +388,7 @@ struct ArchCPU { /* < private > */ CPUState parent_obj; /* < public > */ - CPUNegativeOffsetState neg; + CPURISCVState env; char *dyn_csr_xml; diff --git a/target/rx/cpu.h b/target/rx/cpu.h index 7f03ffcfed..f66754eb8a 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -111,7 +111,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPURXState env; }; diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 304029e57c..7bea7075e1 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -170,7 +170,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUS390XState env; S390CPUModel *model; /* needed for live migration */ diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 1399d3840f..f75a235973 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -208,7 +208,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUSH4State env; }; diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 98044572f2..b3a98f1d74 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -561,7 +561,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUSPARCState env; }; diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 1cace96b01..a357b573f2 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -67,7 +67,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUTriCoreState env; }; diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 87fe992ba6..c6bbef1e5d 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -560,9 +560,8 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - Clock *clock; - CPUNegativeOffsetState neg; CPUXtensaState env; + Clock *clock; }; -- cgit v1.2.3