From 05a9a6519c9127b5fb0b13481ecc0e72331c8a38 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Wed, 16 May 2018 00:04:54 +0200 Subject: target-microblaze: dec_msr: Plug a temp leak MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Plug a temp leak. Reported-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Edgar E. Iglesias --- target/microblaze/translate.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'target') diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 7475003847..756d901eba 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -516,12 +516,17 @@ static void dec_msr(DisasContext *dc) #if !defined(CONFIG_USER_ONLY) /* Catch read/writes to the mmu block. */ if ((sr & ~0xff) == 0x1000) { + TCGv_i32 tmp_sr; + sr &= 7; + tmp_sr = tcg_const_i32(sr); LOG_DIS("m%ss sr%d r%d imm=%x\n", to ? "t" : "f", sr, dc->ra, dc->imm); - if (to) - gen_helper_mmu_write(cpu_env, tcg_const_i32(sr), cpu_R[dc->ra]); - else - gen_helper_mmu_read(cpu_R[dc->rd], cpu_env, tcg_const_i32(sr)); + if (to) { + gen_helper_mmu_write(cpu_env, tmp_sr, cpu_R[dc->ra]); + } else { + gen_helper_mmu_read(cpu_R[dc->rd], cpu_env, tmp_sr); + } + tcg_temp_free_i32(tmp_sr); return; } #endif -- cgit v1.2.3