From 98736654f3dfbf984d9e26c9be0480b0560c1067 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Thu, 18 Apr 2019 16:36:36 -0700 Subject: target/xtensa: update list of exception causes Add XEA2 exception cause codes defined in recent Xtensa ISA releases. Signed-off-by: Max Filippov --- target/xtensa/cpu.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'target/xtensa') diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index ba4ef2b6a7..8301923e4c 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -280,14 +280,15 @@ enum { LEVEL1_INTERRUPT_CAUSE, ALLOCA_CAUSE, INTEGER_DIVIDE_BY_ZERO_CAUSE, - PRIVILEGED_CAUSE = 8, + PC_VALUE_ERROR_CAUSE, + PRIVILEGED_CAUSE, LOAD_STORE_ALIGNMENT_CAUSE, - - INSTR_PIF_DATA_ERROR_CAUSE = 12, + EXTERNAL_REG_PRIVILEGE_CAUSE, + EXCLUSIVE_ERROR_CAUSE, + INSTR_PIF_DATA_ERROR_CAUSE, LOAD_STORE_PIF_DATA_ERROR_CAUSE, INSTR_PIF_ADDR_ERROR_CAUSE, LOAD_STORE_PIF_ADDR_ERROR_CAUSE, - INST_TLB_MISS_CAUSE, INST_TLB_MULTI_HIT_CAUSE, INST_FETCH_PRIVILEGE_CAUSE, -- cgit v1.2.3