From 98670d47cd8d63a529ff230fd39ddaa186156f8c Mon Sep 17 00:00:00 2001 From: Laurent Vivier Date: Thu, 18 Jan 2018 20:38:40 +0100 Subject: accel/tcg: add size paremeter in tlb_fill() The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier Reviewed-by: David Hildenbrand Reviewed-by: Richard Henderson Message-Id: <20180118193846.24953-2-laurent@vivier.eu> --- target/xtensa/op_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target/xtensa') diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 012552817f..43182b113e 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -50,8 +50,8 @@ void xtensa_cpu_do_unaligned_access(CPUState *cs, } } -void tlb_fill(CPUState *cs, target_ulong vaddr, MMUAccessType access_type, - int mmu_idx, uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong vaddr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { XtensaCPU *cpu = XTENSA_CPU(cs); CPUXtensaState *env = &cpu->env; -- cgit v1.2.3