From 2bdbe35632fc1f5f83054427085f59d28f45660f Mon Sep 17 00:00:00 2001 From: Bastian Koppelmann Date: Mon, 28 Aug 2023 13:26:44 +0200 Subject: target/tricore: Implement FTOU insn Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann Message-ID: <20230828112651.522058-5-kbastian@mail.uni-paderborn.de> --- target/tricore/fpu_helper.c | 32 ++++++++++++++++++++++++++++++++ target/tricore/helper.h | 1 + target/tricore/translate.c | 3 +++ 3 files changed, 36 insertions(+) (limited to 'target/tricore') diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c index cb7ee7dd35..3aefeb776e 100644 --- a/target/tricore/fpu_helper.c +++ b/target/tricore/fpu_helper.c @@ -429,6 +429,38 @@ uint32_t helper_ftoiz(CPUTriCoreState *env, uint32_t arg) return result; } +uint32_t helper_ftou(CPUTriCoreState *env, uint32_t arg) +{ + float32 f_arg = make_float32(arg); + uint32_t result; + int32_t flags = 0; + + result = float32_to_uint32(f_arg, &env->fp_status); + + flags = f_get_excp_flags(env); + if (flags & float_flag_invalid) { + flags &= ~float_flag_inexact; + if (float32_is_any_nan(f_arg)) { + result = 0; + } + /* + * we need to check arg < 0.0 before rounding as TriCore needs to raise + * float_flag_invalid as well. For instance, when we have a negative + * exponent and sign, softfloat would only raise float_flat_inexact. + */ + } else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) { + flags = float_flag_invalid; + result = 0; + } + + if (flags) { + f_update_psw_flags(env, flags); + } else { + env->FPU_FS = 0; + } + return result; +} + uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg) { float32 f_arg = make_float32(arg); diff --git a/target/tricore/helper.h b/target/tricore/helper.h index 190645413a..827fbaa692 100644 --- a/target/tricore/helper.h +++ b/target/tricore/helper.h @@ -114,6 +114,7 @@ DEF_HELPER_2(ftoi, i32, env, i32) DEF_HELPER_2(itof, i32, env, i32) DEF_HELPER_2(utof, i32, env, i32) DEF_HELPER_2(ftoiz, i32, env, i32) +DEF_HELPER_2(ftou, i32, env, i32) DEF_HELPER_2(ftouz, i32, env, i32) DEF_HELPER_2(updfl, void, env, i32) /* dvinit */ diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 4e7e18f985..382ecf4775 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -6269,6 +6269,9 @@ static void decode_rr_divide(DisasContext *ctx) case OPC2_32_RR_ITOF: gen_helper_itof(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); break; + case OPC2_32_RR_FTOU: + gen_helper_ftou(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); + break; case OPC2_32_RR_FTOUZ: gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); break; -- cgit v1.2.3