From fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Tue, 11 Oct 2016 08:56:52 +0200 Subject: Move target-* CPU file into a target/ folder We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier [m68k part] Acked-by: Bastian Koppelmann [tricore part] Acked-by: Michael Walle [lm32 part] Acked-by: Cornelia Huck [s390x part] Reviewed-by: Christian Borntraeger [s390x part] Acked-by: Eduardo Habkost [i386 part] Acked-by: Artyom Tarasenko [sparc part] Acked-by: Richard Henderson [alpha part] Acked-by: Max Filippov [xtensa part] Reviewed-by: David Gibson [ppc part] Acked-by: Edgar E. Iglesias [crisµblaze part] Acked-by: Guan Xuetao [unicore32 part] Signed-off-by: Thomas Huth --- target/sparc/cpu-qom.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 target/sparc/cpu-qom.h (limited to 'target/sparc/cpu-qom.h') diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h new file mode 100644 index 0000000000..f63af728ee --- /dev/null +++ b/target/sparc/cpu-qom.h @@ -0,0 +1,56 @@ +/* + * QEMU SPARC CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ +#ifndef QEMU_SPARC_CPU_QOM_H +#define QEMU_SPARC_CPU_QOM_H + +#include "qom/cpu.h" + +#ifdef TARGET_SPARC64 +#define TYPE_SPARC_CPU "sparc64-cpu" +#else +#define TYPE_SPARC_CPU "sparc-cpu" +#endif + +#define SPARC_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(SPARCCPUClass, (klass), TYPE_SPARC_CPU) +#define SPARC_CPU(obj) \ + OBJECT_CHECK(SPARCCPU, (obj), TYPE_SPARC_CPU) +#define SPARC_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(SPARCCPUClass, (obj), TYPE_SPARC_CPU) + +/** + * SPARCCPUClass: + * @parent_realize: The parent class' realize handler. + * @parent_reset: The parent class' reset handler. + * + * A SPARC CPU model. + */ +typedef struct SPARCCPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + DeviceRealize parent_realize; + void (*parent_reset)(CPUState *cpu); +} SPARCCPUClass; + +typedef struct SPARCCPU SPARCCPU; + +#endif -- cgit v1.2.3