From 15e12add0b1256f3e699541c2eb8320e0f63a02d Mon Sep 17 00:00:00 2001 From: David Hildenbrand Date: Thu, 7 Mar 2019 13:15:35 +0100 Subject: s390x/tcg: Implement VECTOR STORE Properly probe the whole access first. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand Message-Id: <20190307121539.12842-29-david@redhat.com> Signed-off-by: Cornelia Huck --- target/s390x/translate_vx.inc.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'target/s390x/translate_vx.inc.c') diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index cf1d319e4e..fcddd0cde7 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -113,6 +113,7 @@ static void write_vec_element_i64(TCGv_i64 src, int reg, uint8_t enr, } } + static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr, uint8_t es) { @@ -817,3 +818,19 @@ static DisasJumpType op_vseg(DisasContext *s, DisasOps *o) tcg_temp_free_i64(tmp); return DISAS_NEXT; } + +static DisasJumpType op_vst(DisasContext *s, DisasOps *o) +{ + TCGv_i64 tmp = tcg_const_i64(16); + + /* Probe write access before actually modifying memory */ + gen_helper_probe_write_access(cpu_env, o->addr1, tmp); + + read_vec_element_i64(tmp, get_field(s->fields, v1), 0, ES_64); + tcg_gen_qemu_st_i64(tmp, o->addr1, get_mem_index(s), MO_TEQ); + gen_addi_and_wrap_i64(s, o->addr1, o->addr1, 8); + read_vec_element_i64(tmp, get_field(s->fields, v1), 1, ES_64); + tcg_gen_qemu_st_i64(tmp, o->addr1, get_mem_index(s), MO_TEQ); + tcg_temp_free_i64(tmp); + return DISAS_NEXT; +} -- cgit v1.2.3