From b2899495e3bd467adb9ef195655407cd58a97ded Mon Sep 17 00:00:00 2001 From: Suraj Jitindar Singh Date: Wed, 1 Mar 2017 17:54:38 +1100 Subject: target/ppc/POWER9: Add POWER9 mmu fault handler Add a new mmu fault handler for the POWER9 cpu and add it as the handler for the POWER9 cpu definition. This handler checks if the guest is radix or hash based on the value in the partition table entry and calls the correct fault handler accordingly. The hash fault handling code has also been updated to check if the partition is using segment tables. Currently only legacy hash (no segment tables) is supported. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson Signed-off-by: David Gibson --- target/ppc/translate_init.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'target/ppc/translate_init.c') diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 1a05ac36e5..dc2f8ebe10 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -32,6 +32,7 @@ #include "qapi/visitor.h" #include "hw/qdev-properties.h" #include "hw/ppc/ppc.h" +#include "mmu-book3s-v3.h" //#define PPC_DUMP_CPU //#define PPC_DEBUG_SPR @@ -8910,7 +8911,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_3_00; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; + pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; /* segment page size remain the same */ pcc->sps = &POWER7_POWER8_sps; #endif -- cgit v1.2.3