From fbda88f7abdeed3ceebdd18de6909a52df756c1c Mon Sep 17 00:00:00 2001 From: Nicholas Piggin Date: Mon, 15 May 2023 19:26:47 +1000 Subject: target/ppc: Fix width of some 32-bit SPRs Some 32-bit SPRs are incorrectly implemented as 64-bits on 64-bit targets. This changes VRSAVE, DSISR, HDSISR, DAWRX0, PIDR, LPIDR, DEXCR, HDEXCR, CTRL, TSCR, MMCRH, and PMC[1-6] from to be 32-bit registers. This only goes by the 32/64 classification in the architecture, it does not try to implement finer details of SPR implementation (e.g., not all bits implemented as simple read/write storage). Signed-off-by: Nicholas Piggin Reviewed-by: Harsh Prateek Bora Message-Id: <20230515092655.171206-2-npiggin@gmail.com> Signed-off-by: Daniel Henrique Barboza --- target/ppc/translate.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'target/ppc/translate.c') diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 1720570b9b..9b7884586c 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -411,19 +411,6 @@ void spr_write_generic(DisasContext *ctx, int sprn, int gprn) spr_store_dump_spr(sprn); } -void spr_write_CTRL(DisasContext *ctx, int sprn, int gprn) -{ - spr_write_generic(ctx, sprn, gprn); - - /* - * SPR_CTRL writes must force a new translation block, - * allowing the PMU to calculate the run latch events with - * more accuracy. - */ - ctx->base.is_jmp = DISAS_EXIT_UPDATE; -} - -#if !defined(CONFIG_USER_ONLY) void spr_write_generic32(DisasContext *ctx, int sprn, int gprn) { #ifdef TARGET_PPC64 @@ -436,6 +423,19 @@ void spr_write_generic32(DisasContext *ctx, int sprn, int gprn) #endif } +void spr_write_CTRL(DisasContext *ctx, int sprn, int gprn) +{ + spr_write_generic32(ctx, sprn, gprn); + + /* + * SPR_CTRL writes must force a new translation block, + * allowing the PMU to calculate the run latch events with + * more accuracy. + */ + ctx->base.is_jmp = DISAS_EXIT_UPDATE; +} + +#if !defined(CONFIG_USER_ONLY) void spr_write_clear(DisasContext *ctx, int sprn, int gprn) { TCGv t0 = tcg_temp_new(); -- cgit v1.2.3