From 60caf2216bf03d0f32ef11cb670279d0dea6d593 Mon Sep 17 00:00:00 2001 From: Avinesh Kumar Date: Mon, 28 Nov 2016 13:26:42 +0530 Subject: target-ppc: add vextu[bhw][lr]x instructions vextublx: Vector Extract Unsigned Byte Left vextuhlx: Vector Extract Unsigned Halfword Left vextuwlx: Vector Extract Unsigned Word Left vextubrx: Vector Extract Unsigned Byte Right-Indexed VX-form vextuhrx: Vector Extract Unsigned Halfword Right-Indexed VX-form vextuwrx: Vector Extract Unsigned Word Right-Indexed VX-form Signed-off-by: Avinesh Kumar Signed-off-by: Hariharan T.S. [ implement using int128_rshift ] Signed-off-by: Nikunj A Dadhania Reviewed-by: Richard Henderson Signed-off-by: David Gibson --- target/ppc/cpu.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'target/ppc/cpu.h') diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index b6782ba678..7a6ee3f05b 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -21,6 +21,7 @@ #define PPC_CPU_H #include "qemu-common.h" +#include "qemu/int128.h" //#define PPC_EMULATE_32BITS_HYPV @@ -262,6 +263,7 @@ union ppc_avr_t { #ifdef CONFIG_INT128 __uint128_t u128; #endif + Int128 s128; }; #if !defined(CONFIG_USER_ONLY) -- cgit v1.2.3