From a1b092537ac52b9a19e14ea163cb653149efcbb8 Mon Sep 17 00:00:00 2001 From: Stefan Pejic Date: Wed, 4 May 2022 13:03:57 +0200 Subject: target/mips: Fix emulation of nanoMIPS MTHLIP instruction MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The field ac in nanoMIPS instruction MTHLIP rs, ac is specified in nanoMIPS documentation as opcode[15..14] (2 bits). However, in the current QEMU code, the corresponding argument passed to the helper gen_helper_mthlip() has the value of opcode[15..11] (5 bits). Right shift the value of this argument by three bits to fix this. Signed-off-by: Stefan Pejic Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220504110403.613168-2-stefan.pejic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/nanomips_translate.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/mips') diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc index 916cece4d2..58ae35a156 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -1597,7 +1597,7 @@ static void gen_pool32axf_1_nanomips_insn(DisasContext *ctx, uint32_t opc, check_dsp(ctx); switch (extract32(ctx->opcode, 12, 2)) { case NM_MTHLIP: - tcg_gen_movi_tl(t0, v2); + tcg_gen_movi_tl(t0, v2 >> 3); gen_helper_mthlip(t0, v0_t, cpu_env); break; case NM_SHILOV: -- cgit v1.2.3