From d965dc35592d24c0c1519f1c566223c6277cb80e Mon Sep 17 00:00:00 2001 From: Xiaoyao Li Date: Mon, 16 Mar 2020 17:56:05 +0800 Subject: target/i386: Add ARCH_CAPABILITIES related bits into Icelake-Server CPU model Current Icelake-Server CPU model lacks all the features enumerated by MSR_IA32_ARCH_CAPABILITIES. Add them, so that guest of "Icelake-Server" can see all of them. Signed-off-by: Xiaoyao Li Message-Id: <20200316095605.12318-1-xiaoyao.li@intel.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'target/i386') diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f3b25c7301..90ffc5f3b1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3471,6 +3471,19 @@ static X86CPUDefinition builtin_x86_defs[] = { { /* end of list */ } }, }, + { + .version = 3, + .props = (PropValue[]) { + { "arch-capabilities", "on" }, + { "rdctl-no", "on" }, + { "ibrs-all", "on" }, + { "skip-l1dfl-vmentry", "on" }, + { "mds-no", "on" }, + { "pschange-mc-no", "on" }, + { "taa-no", "on" }, + { /* end of list */ } + }, + }, { /* end of list */ } } }, -- cgit v1.2.3