From 0d0a16c647650d476219a5e1313dec434f9fbebb Mon Sep 17 00:00:00 2001
From: Richard Henderson <richard.henderson@linaro.org>
Date: Thu, 25 Jan 2018 11:45:29 +0000
Subject: target/arm: Add ARM_FEATURE_SVE
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Not enabled anywhere so far.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180119045438.28582-11-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 1 +
1 file changed, 1 insertion(+)
(limited to 'target/arm')
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7d396606f3..6f6e88511e 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1340,6 +1340,7 @@ enum arm_features {
ARM_FEATURE_VBAR, /* has cp15 VBAR */
ARM_FEATURE_M_SECURITY, /* M profile Security Extension */
ARM_FEATURE_JAZELLE, /* has (trivial) Jazelle implementation */
+ ARM_FEATURE_SVE, /* has Scalable Vector Extension */
};
static inline int arm_feature(CPUARMState *env, int feature)
--
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